ULP running at 8mhz?

[kbaud1]

See ULP code below:

This runs at about 80-120khz. Ideally, it loop consistently and at least 100khz. Ideas?

This is part of a project to read rotary encoders. Thank you for your time.

Code: Select all

#include "soc/rtc_cntl_reg.h"
#include "soc/rtc_io_reg.h"
#include "soc/soc_ulp.h"

// Define constants
	.set rows, 2000

// Variables defined in .bss section (initialized my main CPU)
	.bss
	.global error
error:
	.long 0

	.global readi
readi:
	.long 0

	.global writei
writei:
	.long 0

	.global buffer
buffer:
	.fill 210 * 4	// fix this (change # to rows)


// Code defined in .text section
	.text
	.global entry
entry:

	// set buffer [writei] = IO pins
	READ_RTC_FIELD (RTC_GPIO_IN_REG, RTC_GPIO_IN_NEXT)	// r0 = lower 16 RTC IOs
	move r1, writei										// r1 = &writei
	ld r2, r1, 0										// r2 = writei
	add r3, r2, buffer									// r3 = &(buffer [writei])
	st r0, r3, 0										// buffer [writei] = r0
// this test was used to make sure every field in array had right value in it
//st r2, r3, 0	//buffer [writei] = writei

	// set writei = (writei + 1) % rows
	add r0, r2, 1										// r0 = writei + 1
	jumpr A, rows, lt									// skip next if r0 < rows
	move r0, 0											// r0 = 0
A:	move r2, readi										// r2 = &readi
	ld r3, r2, 0										// r3 = readi
	st r0, r1, 0										// writei = r0

	// set error if writei == readi
	move r1, error										// r1 = &error
	move r2, 1											// r2 = 1
	sub r0, r0, r3										// r0 = writei - readi
	jumpr entry, 1, ge									// skip next if r0 != 0
	st r2, r1, 0										// error = 1
	jump entry