How to keep DAC output level during deepsleep?

[temp4eb]

Hi all,
I want to know if it is possible to achieve DAC keeping output voltage level during the deepsleep？For example，GPIO25 kept 2V level during the deepsleep.The Pins of DAC should be RTCIO,right?Thanx!

[temp4eb]

According to the document:
When configured as RTC GPIOs, the output pads can still retain the output level value when the chip is in
Deep-sleep mode, and the input pads can wake up the chip from Deep-sleep.

But I did not find any way to achieve this..............

[WiFive]

You probably need ulp to use dac otherwise only latched digital outputs