ULP RISC-V Interrupts/Timers

Michaelboeding
Posts: 8
Joined: Tue Aug 29, 2023 2:12 pm

ULP RISC-V Interrupts/Timers

Postby Michaelboeding » Tue Oct 22, 2024 10:46 pm

I’m working on using the ESP32's ULP (Ultra-Low Power) mode for activity tracking with an accelerometer, and I’m trying to figure out the best way to implement this.

Here’s what I want to achieve:

Mark Activity as Active/Inactive: I need to monitor each minute. If a wake-up interrupt occurs from the accelerometer, I mark that minute as "active." If no interrupt occurs, it should be marked as "inactive."

Timer for Inactive Periods: I want a timer running in the ULP that resets every minute, marking the period as "inactive" if there’s no wake-up interrupt.

Main Application Sync: When the main app wakes up, I want to back-calculate activity based on the ULP's runtime and sync it with a Unix timestamp to create accurate time-stamped data.


Question:
How can I set up the ULP to trigger at regular intervals (like every minute) for marking inactivity, while still allowing GPIO interrupts for activity detection? What’s the best way to handle the timing and interrupts together in this scenario? I would rather not be constantly polling but just have it act like a RTC timer to wake up the ULP if possible. And if a wake up interrupt occurs reset the timer.

MicroController
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Location: Europe, Germany

Re: ULP RISC-V Interrupts/Timers

Postby MicroController » Wed Oct 23, 2024 11:41 am

Actively tracking both active and inactive times seems redundant. Just track activity; times with no 'activity' entry are by definition inactive.

Michaelboeding
Posts: 8
Joined: Tue Aug 29, 2023 2:12 pm

Re: ULP RISC-V Interrupts/Timers

Postby Michaelboeding » Thu Oct 24, 2024 4:34 am

How would you get the time in the ULP? This would be fine if I had a way to also log the timestamp and back calculate once the main processor is woken up. Ideally without running a while loop in the ULP.

MicroController
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Location: Europe, Germany

Re: ULP RISC-V Interrupts/Timers

Postby MicroController » Thu Oct 24, 2024 1:20 pm

Both the ULP and the main CPU can read the RTC timer which keeps running continuously. This way, ULP events can be placed on a consistent timeline between the ULP and the main CPU.
It may be useful to first determine the actual frequency of the RTC timer from the main CPU, and to communicate it to the ULP so that the ULP can determine the current 'minute' (relative to some point in the past) from the RTC timer.

MicroController
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Joined: Mon Oct 17, 2022 7:38 pm
Location: Europe, Germany

Re: ULP RISC-V Interrupts/Timers

Postby MicroController » Thu Oct 24, 2024 8:41 pm

Pseudocode (ULP):

Code: Select all


#define MAX_MINUTES 60

// INPUT to the ULP code, set from the main CPU:
uint32_t rtcMinuteStartTime; // RTC timer value at the start of the first minute
uint32_t rtcTicksPerMinute; // 60 * f[RTC timer]

// OUTPUT from the ULP code, to be read by the main CPU later; 1 bit for each minute:
uint32_t activity[(MAX_MINUTES+31)/32]; // Enough to hold MAX_MINUTES bits.

...
if (activityDetected()) {
  const uint32_t currentMinute = (currentRtcCount() - rtcMinuteStartTime) / rtcTicksPerMinute;
  // Set the corresponding bit in activity[] to mark the current minute as an 'active' one:
  const uint32_t actWord = currentMinute / 32;
  const uint32_t actBit = currentMinute % 32;
  activity[actWord] |= (1 << actBit);
}
...

Michaelboeding
Posts: 8
Joined: Tue Aug 29, 2023 2:12 pm

Re: ULP RISC-V Interrupts/Timers

Postby Michaelboeding » Thu Oct 24, 2024 10:48 pm

Perfect in that case I could just read that when an interrupt happens for activity and that would be way better than polling....would you happen to know how to do that in the RSIC-V ULP? I found an assembly example here but not sure how to actually accomplish this using the RISC-V https://esp32.com/viewtopic.php?f=13&t=18013 . Or if you could point me in the right direction that would be great - thanks

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