ESP Zigbee Gateway DevKit (ESP32-S3 + ESP32-H2) connection details

Shivi6
Posts: 1
Joined: Wed Jul 24, 2024 11:49 am

ESP Zigbee Gateway DevKit (ESP32-S3 + ESP32-H2) connection details

Postby Shivi6 » Wed Jul 24, 2024 11:54 am

On flashing the ot_rcp example to ESP32-H2 from esp-idf and flashing zigbee_bridge example from esp-matter to ESP32-S3 , on monitoring S3, I am getting the error "E (1552) ZB_ESP_PLATFORM: esp_zb_platform_config(55): host mode uart not supported"

I have no clue about the connections from scratch. Can someone help me on how exactly to connect the board with the 2 USB-to-C ports and which one to monitor? After flashing the example, what should be the next step?

etsura
Posts: 2
Joined: Fri Apr 27, 2018 7:06 pm

Re: ESP Zigbee Gateway DevKit (ESP32-S3 + ESP32-H2) connection details

Postby etsura » Tue Oct 08, 2024 2:49 pm

Any updates? I'm faced the same issue with Thread Gateway Board.
Have same issue with 5.3.1 and esp_zigbee_gateway examples. All code by default.
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce2810,len:0x178c
load:0x403c8700,len:0x4
load:0x403c8704,len:0xcb8
load:0x403cb700,len:0x2db0
entry 0x403c8914
I (26) boot: ESP-IDF v5.3.1-dirty 2nd stage bootloader
I (26) boot: compile time Oct 8 2024 17:17:35
I (26) boot: Multicore bootloader
I (30) boot: chip revision: v0.1
I (34) boot.esp32s3: Boot SPI Speed : 80MHz
I (38) boot.esp32s3: SPI Mode : DIO
I (43) boot.esp32s3: SPI Flash Size : 4MB
I (48) boot: Enabling RNG early entropy source...
I (53) boot: Partition Table:
I (57) boot: ## Label Usage Type ST Offset Length
I (64) boot: 0 nvs WiFi data 01 02 00009000 00006000
I (72) boot: 1 phy_init RF data 01 01 0000f000 00001000
I (79) boot: 2 factory factory app 00 00 00010000 0015e000
I (87) boot: 3 zb_storage Unknown data 01 81 0016e000 00004000
I (94) boot: 4 zb_fct Unknown data 01 81 00172000 00000400
I (101) boot: 5 rcp_fw Unknown data 01 82 00173000 0007d000
I (109) boot: End of partition table
I (113) esp_image: segment 0: paddr=00010020 vaddr=3c0c0020 size=26aach (158380) map
I (150) esp_image: segment 1: paddr=00036ad4 vaddr=3fc9a000 size=04944h ( 18756) load
I (155) esp_image: segment 2: paddr=0003b420 vaddr=40374000 size=04bf8h ( 19448) load
I (160) esp_image: segment 3: paddr=00040020 vaddr=42000020 size=bee88h (781960) map
I (305) esp_image: segment 4: paddr=000feeb0 vaddr=40378bf8 size=1134ch ( 70476) load
I (330) boot: Loaded app from partition at offset 0x10000
I (330) boot: Disabling RNG early entropy source...
I (342) cpu_start: Multicore app
I (351) cpu_start: Pro cpu start user code
I (351) cpu_start: cpu freq: 160000000 Hz
I (351) app_init: Application information:
I (354) app_init: Project name: EspZbGateway
I (359) app_init: App version: 1
I (364) app_init: Compile time: Oct 8 2024 17:17:29
I (370) app_init: ELF file SHA256: 466fa220c...
I (375) app_init: ESP-IDF: v5.3.1-dirty
I (380) efuse_init: Min chip rev: v0.0
I (385) efuse_init: Max chip rev: v0.99
I (390) efuse_init: Chip rev: v0.1
I (395) heap_init: Initializing. RAM available for dynamic allocation:
I (402) heap_init: At 3FCAA650 len 0003F0C0 (252 KiB): RAM
I (408) heap_init: At 3FCE9710 len 00005724 (21 KiB): RAM
I (414) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (420) heap_init: At 600FE100 len 00001EE8 (7 KiB): RTCRAM
I (428) spi_flash: detected chip: generic
I (431) spi_flash: flash io: dio
I (436) sleep: Configure to isolate all GPIO pins in sleep state
I (442) sleep: Enable automatic switching of GPIO sleep configuration
I (450) main_task: Started on CPU0
I (460) main_task: Calling app_main()
E (460) ZB_ESP_PLATFORM: esp_zb_platform_config(55): host mode uart not supported
ESP_ERROR_CHECK failed: esp_err_t 0x102 (ESP_ERR_INVALID_ARG) at 0x4200c69e
--- 0x4200c69e: app_main at /home/user/Projects/EspZbGateway/main/esp_zigbee_gateway.c:157 (discriminator 1)

Tried to set host_config.connection_mode to NONE - no success

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