Handle internal interrupt

[urbanze]

How do I assign a internal system interrupt to any function?

I want to test first with the ULP WAKE register:
"If the SoC is not in deep sleep mode, and ULP interrupt bit (RTC_CNTL_ULP_CP_INT_ENA) is set in RTC_CNTL_INT_ENA_REG register, RTC interrupt will be triggered."

I noticed that in this link:
http://esp-idf.readthedocs.io/en/latest ... alloc.html

It is quoted about the allocation of interrupts, but I did not quite understand how to do this in practice (the functions parameters are not clear to me).

Could someone give an example of assigning internal interrupt to a function?

[WiFive]

https://github.com/espressif/esp-idf/bl ... .h#L21-L38

[urbanze]

https://github.com/espressif/esp-idf/bl ... .h#L21-L38

The problem is that I did not understand this story of "intr_handler_t" nor "handler arg".
Could you explain how to create/work/what is this item or some practical example so that I can study it?

[WiFive]

https://github.com/espressif/esp-idf/bl ... ule.c#L425
https://github.com/espressif/esp-idf/bl ... ain.c#L173

[urbanze]

Well, at least I was able to define a function at ISR.

The phrase taken from "WAKE" in the datasheet says about the activation of "RTC_CNTL_ULP_CP_INT_ENA", I tried this and even "esp_sleep_enable_ulp_wakeup ()" but I think the error is in the BIT assigned to the ISR: "rtc_isr_register (wk, NULL, ETS_RTC_CORE_INTR_SOURCE);"

I have tested several, including the "RTC_CNTL_ULP_CP_INT_ENA" and nothing has caused the LED to light up, what's wrong?

Code: Select all

void ulp();
void IRAM_ATTR wk(void*z);


extern "C" void app_main()
{
	REG_WRITE(GPIO_ENABLE_REG, BIT2);

	ulp();
	rtc_isr_register(wk, NULL, ETS_RTC_CORE_INTR_SOURCE);
}

void IRAM_ATTR wk(void*z)
{
	REG_WRITE(GPIO_OUT_W1TS_REG, BIT2);
}

void ulp()
{
	adc1_config_channel_atten(ADC1_CHANNEL_5, ADC_ATTEN_0db);
	adc1_config_width(ADC_WIDTH_12Bit);
	adc1_ulp_enable();

	REG_WRITE(RTC_CNTL_INT_ENA_REG, BIT5);
	//esp_sleep_enable_ulp_wakeup();

	ulp_load_binary(0, ulp_main_bin_start, (ulp_main_bin_end - ulp_main_bin_start) / sizeof(uint32_t));
	ulp_run((&ulp_main - RTC_SLOW_MEM) / sizeof(uint32_t));
}

[WiFive]

https://github.com/espressif/esp-idf/bl ... reg.h#L671

RTC_CNTL_SAR_INT_ST_M

[urbanze]

https://github.com/espressif/esp-idf/bl ... reg.h#L671

RTC_CNTL_SAR_INT_ST_M

unfortunately, I also tried this one and your "brothers" like .....ST, ST_M, ST_V, ST_S before and just tried it, it did not work. See code's:

Code: Select all

extern "C" void app_main()
{
	REG_WRITE(GPIO_ENABLE_REG, BIT2);


	ulp();
	rtc_isr_register(wk, NULL, RTC_CNTL_SAR_INT_ST_M);
	
	while (1)
	{
		delay(250);
	}
}

void IRAM_ATTR wk(void*z)
{
	REG_WRITE(GPIO_OUT_W1TS_REG, BIT2);
}

void ulp()
{
	adc1_config_channel_atten(ADC1_CHANNEL_5, ADC_ATTEN_0db);
	adc1_config_width(ADC_WIDTH_12Bit);
	adc1_ulp_enable();

	REG_WRITE(RTC_CNTL_INT_ENA_REG, BIT5);
	//esp_sleep_enable_ulp_wakeup();

	ulp_load_binary(0, ulp_main_bin_start, (ulp_main_bin_end - ulp_main_bin_start) / sizeof(uint32_t));
	ulp_run((&ulp_main - RTC_SLOW_MEM) / sizeof(uint32_t));
}

ULP

Code: Select all

#include "soc/soc_ulp.h"
#include "soc/rtc_io_reg.h"
#include "soc/sens_reg.h"
#include "soc/rtc_cntl_reg.h"



.bss
.global value
		value:.long 0

.text


	.global main
	main:

	jump loop
	
	
	loop:
		
		stage_rst
		100: wait 16000
		stage_inc 1
		jumps 100b, 125, lt

		jump adcRead; 1:
		
		move r0, r2
		jumpr wkup, 600, lt


		jump loop


	adcRead:

		move r0, value
		move r1, 0
		move r2, 0

		stage_rst
		100:
			wait 40000
			wait 40000
			adc r1, 0, 5+1
			add r2, r2, r1
			stage_inc 1
			jumps 100b, 4, lt

		rsh r2, r2, 2
		st r2, r0, 0
		
		jump 1b

	wkup:
		wake
		WRITE_RTC_REG(RTC_CNTL_STATE0_REG, RTC_CNTL_ULP_CP_SLP_TIMER_EN, 0, 0)//Timer OFF
		halt

[ESP_igrr]

You probably also need to set the corresponding enable bit in RTC_CNTL_INT_ENA_REG, i.e. REG_SET_BIT(RTC_CNTL_INT_ENA_REG, RTC_CNTL_ULP_CP_INT_ENA_M).

[urbanze]

You probably also need to set the corresponding enable bit in RTC_CNTL_INT_ENA_REG, i.e. REG_SET_BIT(RTC_CNTL_INT_ENA_REG, RTC_CNTL_ULP_CP_INT_ENA_M).

I've already done it differently, I hope it will result in the same as "REG_SET_BIT".

Anyway, I tested your command and it also did not work!!!! Is it a BUG?

[urbanze]

I tested several registers and nothing worked. I need help with this

What is wrong? Or is it really a bug in handler/ulp?