adc dma中 adc_continuous_handle_cfg_t::conv_frame_size 的设置

swwdsy
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Joined: Thu Sep 21, 2023 2:17 am

adc dma中 adc_continuous_handle_cfg_t::conv_frame_size 的设置

Postby swwdsy » Thu Sep 21, 2023 6:38 am

使用esp32s2,idf-5.1.1。
连续读取 3个channl 的adc。

按照adc_continuous.h中表述

Code: Select all

/**
 * @brief ADC continuous mode driver initial configurations
 */
typedef struct {
    uint32_t max_store_buf_size;    ///< Max length of the conversion Results that driver can store, in bytes.
    uint32_t conv_frame_size;       ///< Conversion frame size, in bytes. This should be in multiples of `SOC_ADC_DIGI_DATA_BYTES_PER_CONV`.
} adc_continuous_handle_cfg_t;
conv_frame_size需要是SOC_ADC_DIGI_DATA_BYTES_PER_CONV的倍数,也就是 2 的倍数。
我将conv_frame_size设置为 channl * SOC_ADC_DIGI_DATA_BYTES_PER_CONV,也就是 3 * 2 。
这是会出现错误。

因为adc_hal.c中,会进行断言,要求为4的倍数。

Code: Select all

static void adc_hal_digi_dma_link_descriptors(dma_descriptor_t *desc, uint8_t *data_buf, uint32_t per_eof_size, uint32_t eof_step, uint32_t eof_num)
{
    HAL_ASSERT(((uint32_t)data_buf % 4) == 0);
    HAL_ASSERT((per_eof_size % 4) == 0);
于是尝试将 conv_frame_size 从之前的 6 改为8,不再出现错误。

是adc_continuous.h中说的是错的吗,还是我理解错了?

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