ESP32-S3 ULP-FSM SENS_ register r/w problem

[rhgoll]

Hello!

I have a problem with reading and writing the following register using C macro on ESP32-S3 ULP-FSM processor:

Code: Select all

SENS_SAR_PERI_CLK_GATE_CONF_REG

Can anyobody help me with this?

I made an issue also with this problem here:
https://github.com/espressif/arduino-esp32/issues/8275

Thank you!

Code: Select all

const ulp_insn_t program[] =
{
  I_MOVI(R3,_v(rtc_slow_debug_sens1)),
  I_RD_REG(SENS_SAR_PERI_CLK_GATE_CONF_REG,0,15),
  I_STL(R0,R3,0),
  I_RD_REG(SENS_SAR_PERI_CLK_GATE_CONF_REG,16,31),
  I_STH(R0,R3,0),
  I_WR_REG_BIT(SENS_SAR_PERI_CLK_GATE_CONF_REG,SENS_IOMUX_CLK_EN_S,1),
  I_MOVI(R3,_v(rtc_slow_debug_sens2)),
  I_RD_REG(SENS_SAR_PERI_CLK_GATE_CONF_REG,0,15),
  I_STL(R0,R3,0),
  I_RD_REG(SENS_SAR_PERI_CLK_GATE_CONF_REG,16,31),
  I_STH(R0,R3,0),
  I_MOVI(R3,_v(rtc_slow_ulp_finished)),
  I_MOVI(R0,1),
  I_STL(R0,R3,0),
  I_END(),
  I_HALT()
};