ESP32 I2S behaviours on different FIFO modes

[Ali_Makhlouf]

I am working on an LCD project interfacing ESP32 Wroom with ER-TFTM043-7S (800x480 - SSD1963) buydisplay LCD.

However I have some questions about the behavior of the I2S:

from other forums I knew that the I2S swaps the order like this

internal data : 0 1 2 3
How I2S sends it: 2 3 0 2

and then there is the FIFO modes which are defined in the esp32 datasheet (Page 307) as table 60 below:

TX_FIFO_MODs.png (48.35 KiB) Viewed 3031 times

I will be choosing between 1 and 3 (0 & 2 are for dual channel)

In page 307 it Said.

In Tx FIFO mode0, the Tx datato-be-sent are written into FIFO according to the time order. In Tx FIFO mode1, the data-to-be-sent are divided into 16 high- and 16 low-order bits. Then, both the 16 high- and 16 low-order bits are recomposed and written into FIFO.

fifo modes0 vs mode1.png (66.6 KiB) Viewed 3031 times

and from the attached image above they explained it like this:

The details are shown in Figure 68 with the corresponding registers listed in Table 60. Dn′ consists of 16 high-order bits of Dn and 16 zeros. Dn′′ consists of 16 low-order bits of Dn and 16 zeros. That is to say, D′n = {Dn[31 : 16], 16′h0}, Dn′′ = {Dn[15 : 0], 16′ 0}

So from my understanding applying option 3 in the FIFO_MOD the I2S will send data as this:
FIFO_MOD = 3
Internal data : 0 1 2 3
How I2S sends: 2 3 0 1

FIFO mode = 1
Internal data Bytes : 2 3 4 5
How I2S sends : 4 5 0 0 0 0 2 3

Is this right?

and why does most library that uses LCD I2S put it in FIFO_MOD = 1 such as:
1- line 50 in LovyanGFX library I2S parallel library: https://github.com/lovyan03/LovyanGFX/b ... allel8.cpp

2- line 149 in esp32 HMI dev kit I2S parallel :
https://github.com/espressif/esp-dev-ki ... 2_driver.c


isn’t FIFO_MOD 3 is the right one?