Hi All,
I have a strange issue during the Upload process when using the Arduino IDE. The connection process times-out around 70% of upload attempts on a secondary PC. The reason why I say that this is strange is that the exact same board upload almost immediately on my main PC with no timeouts or 100% success.
ESP_En and GPIO0 are controlled via the CP2102N chips RTS and DTR outputs on my PCB (along with secondary manual buttons) and this has been working perfectly for putting the ESP into download mode. The ESP32 WROVER-IE 16MB + PSRAM variant. I have set the flash voltage levels fuse to 3.3V as some of the strapping pins are biased to different levels by external hardware.
The PCB is powered via an external PSU, the USB connection to the PC does not provide power, only data and the USB connected signal, I am using a USB hub.
The both PC's are using the same software versions, only the Silicon Labs driver on the second PC is different (latest version) where as the first PC (100% success rate) is using a slightly older driver. The only other difference I am aware of is that the first PC has live scan exceptions in the Arduino folders to reduce compiler run times. The second PC has no exceptions enabled for live scan as it is a company PC with very very strict IT policies.
Please let me know if I can provide any more information if required.
Thank you!
Strange issue with the esptool.py "Connecting" process reliability difference between two PCs
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Re: Strange issue with the esptool.py "Connecting" process reliability difference between two PCs
It's somewhat of a known issue: the reset sequence of devboards is dependent on the timings of the DTR/RTS sequence to reset the chip into bootloader mode, and those timings are dependent on a whole host of things (like PC hardware, OS, drivers, virtualization, ...). If you want to fix it: sometimes installing an 1uF capacitor between EN and ground helps.
Re: Strange issue with the esptool.py "Connecting" process reliability difference between two PCs
Hi ESP_Sprite,ESP_Sprite wrote: ↑Tue Jun 01, 2021 12:57 amIt's somewhat of a known issue: the reset sequence of devboards is dependent on the timings of the DTR/RTS sequence to reset the chip into bootloader mode, and those timings are dependent on a whole host of things (like PC hardware, OS, drivers, virtualization, ...). If you want to fix it: sometimes installing an 1uF capacitor between EN and ground helps.
Thank you for the reply. I used a 0.1uF cap on EN in my design, I will try a 1uF.
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