I2C Communication Problem Between ESP32 and STM8

[AdemolaLookman]

Hi,
I have a ESP32-WROVER-E(master) and a STM8S003F3(slave). I set up I2C communication between them. I set STM8S I2C output clock frequency to 100KHz. ESP32 I2C clock frequency is the default(100KHz). But it doesn't work. I used 10K, 4.7K and 1K pull-up resistors but nothing changed. If I set the ESP32 I2C clock frequency to 62.5KHz or lower, it works. I used Arduino Mega instead of ESP32. It worked without the need to adjust the I2C clock frequency. What would be the reason? Why ESP32 not working at 100KHz? What's the difference between ESP32 and Arduino Mega?

[ESP_Sprite]

There's nothing in the ESP32 hardware that stops I2C from working at pretty high frequencies... you'll have to post a bit more info: schematics, sources?

[AdemolaLookman]

I don't think the problem is caused by the ESP32 hardware because it runs at 100KHz when it establishes an I2C connection with any sensor. I think the important question is: Arduino Mega can work with STM8 at 100KHz. Why can't ESP32 work with STM8 at 100KHz? Why does it have to work at a lower frequency? How can I fix this problem? Maybe problem is STM8.

[PeterR]

What do you mean by 'I set STM8S I2C output clock frequency to 100KHz'?
The I2C slave must work on the master clock or sample much higher (e.g. like a UART) but then you would have rise/fall propagation delays which you need to match with ESP specification. The slave might work using a faster clock than master so that might explain why things works on slower ESP clock but I would expect the need for a higher slave clock if slave sampling/polling.
My thought is that basically your ESP & STM clocks are running asynchronously. If the STM I2C circuit is 'detecting' on the 100KHz STM clock well you might imagine how aliasing and drift might upset that plan. Note that the slow 'beat' of one clock going 50 ppm faster than the other may well at some point causes quantisation issues when the slave circuit working from its own clock source (even if you think that stuff works with a 5 min test).
I also wonder about the ESP GPIO buffering. There seems to be a crossing of clock domains but not sure. I have always just reduced speed to avoid debugging that issue.
I just don't have enough information about both ESP and STM circuits. Normally these parameters are expressed as minimum rise/fall times but I don't think you will get a clear datasheet answer when (like on an M0) you are in control of the source/bus clock.