Huffman encoding HW acceleration feature

atlascoder
Posts: 51
Joined: Wed Aug 30, 2017 12:36 pm

Huffman encoding HW acceleration feature

Postby atlascoder » Fri May 10, 2019 9:13 am

Hello everyone!

I read in Xtensa ISA https://0x04.net/~mwk/doc/xtensa.pdf chapter 1.1.1 that the Xtensa core is configurable by a brand manufacturers. As far I understand, Espressif is one of such core customers and I'd like to know - does ESP32 ISA contain any Huffman encoding instruction to accelerate this on HW level?

Thanks!

ESP_Sprite
Posts: 9730
Joined: Thu Nov 26, 2015 4:08 am

Re: Huffman encoding HW acceleration feature

Postby ESP_Sprite » Fri May 10, 2019 11:07 am

Not specifically, sorry. Can I ask why you would need this, and what specific instructions you're looking for?

atlascoder
Posts: 51
Joined: Wed Aug 30, 2017 12:36 pm

Re: Huffman encoding HW acceleration feature

Postby atlascoder » Sat May 11, 2019 10:21 am

Thanks for the reply!

I need to form and transfer data that potentially could be compressed very tight what would reduce memory usage and traffic load. My app needs more memory for packing data that coming fast, it uses 2 cores and it would be great if I could use HW accelerated features for data comression. I am surveying for ways of optimisation now and this leaded me to this question.

Who is online

Users browsing this forum: Baidu [Spider], Bing [Bot], Google [Bot] and 115 guests