SPI-2 - Spi Transaction Completed

[srjasz]

Thanks for checking that over.

I am using CPU control and Full Duplex.

I'm wondering if there are actually 2 interrupts per transaction. One when the CS goes active and another when CS goes inactive. I might need to clear the interrupt and check it again to catch when the CS goes inactive and the transaction has completed. I will try it and let you know.

Thanks again.

[srjasz]

I took another look at it and I was clearing the interrupt incorrectly. I was and-ing the transaction done bit field instead of or-ing it. There is a bit of a delay after the transaction has completed. Somewhere between 200ns to 270ns. It is difficult to trigger exactly due to how long it takes to read the interrupt register and do the comparison in a while loop.

As an FYI I have taken the following measurements. SPI in CPU control mode, full duplex, 40mhz clock speed, 16bit transaction.
Time from sending Start SPI command to transaction actually starting is 200ns.
Time of transaction is 400ns.
Time from transaction completing to Transaction Done is 200ns to 270ns.

In short, it takes a bit longer to setup and finish a transaction than it does to do the transaction for 16bits.

Thanks for all the help.