ethernet example is not working

[xien551]

Thanks, ondrej. I have succeed to ping the esp32.

However, I have encounter another question. I wire another esp32 and 83848. While it can not get a IP address. The menuconfig just replace 8720 with 83848, and other parameters is not changed. Are there anything wrong?
---------------------------------------------------------------------------
I (0) cpu_start: App cpu up.
I (260) cpu_start: Pro cpu start user code
I (260) cpu_start: cpu freq: 160000000 Hz
I (260) cpu_start: Application information:
I (264) cpu_start: Project name: ethernet_basic
I (270) cpu_start: App version: v5.0-dev-1389-g5dcd630444-dirty
I (277) cpu_start: Compile time: Mar 25 2022 13:52:11
I (283) cpu_start: ELF file SHA256: 7c5f3d9c909ba6b4...
I (309) heap_init: At 3FFB3D08 len 0002C2F8 (176 KiB): DRAM
I (316) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (322) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (328) heap_init: At 4008BC04 len 000143FC (80 KiB): IRAM
I (336) spi_flash: detected chip: winbond
I (339) spi_flash: flash io: dio
W (343) spi_flash: Detected size(4096k) larger than the size in the binary image header(2048k). Using the size in the binary image header.
I (357) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.
I (367) system_api: Base MAC address is not set
I (377) system_api: read default base MAC address from EFUSE
I (397) esp_eth.netif.netif_glue: 24:0a:c4:81:4a:93
I (397) esp_eth.netif.netif_glue: ethernet attached to netif
I (2097) eth_example: Ethernet Started
I (2097) eth_example: Ethernet Link Up
I (136097) eth_example: Ethernet Link Up
I (136097) eth_example: Ethernet HW Addr 24:0a:c4:81:4a:93

[ESP_ondrej]

Since it is seems the dp83848 was successfully initialized, the MDI (the control interface) is able to correctly communicate with the chip. But it seems there might be an issue with RMII (data interface). How did you connect the PHY with ESP32? Just via wires? Please try to check the following:
- all wiring is correct
- REFCLK is correctly configured (SW configuration respect HW design) and check the REFCLK is present

[xien551]

Well, I don't wire refclk, because the README don't show the wire of refclk.
---------------------------------------------------------------------------------------------
| GPIO | RMII Signal | Notes |
| ------ | ----------- | ------------ |
| GPIO21 | TX_EN | EMAC_TX_EN |
| GPIO19 | TX0 | EMAC_TXD0 |
| GPIO22 | TX1 | EMAC_TXD1 |
| GPIO25 | RX0 | EMAC_RXD0 |
| GPIO26 | RX1 | EMAC_RXD1 |
| GPIO27 | CRS_DV | EMAC_RX_DRV |

* SMI (Serial Management Interface) wiring is not fixed. You may need to changed it according to your board schematic. By default they're connected as follows:

| GPIO | SMI Signal | Notes |
| ------ | ----------- | ------------- |
| GPIO23 | MDC | Output to PHY |
| GPIO18 | MDIO | Bidirectional |
-----------------------------------------------------

So if the refclk is needed, which pin of gpio should be connected? Thank you very much!

[xien551]

Another information, the router seems to find the esp32, but it could not identified it as esp32, and the IP is not distributed.

[ESP_ondrej]

Ou, I see. I'll check that README and consider updating. Thanks for mentioning it. Anyway, there are several options how to connect the REFCLK:
1) External Clock wired to GPIO0 (generated by external oscillator or by PHY).
2) Internal Clock which is generated by ESP32 and provided to PHY via GPIO16/17. Be careful here though since some ESP modules have these already occupied by SPI memory (ESP-WROVER for example).
3) Internal Clock which is generated by ESP32 and provided to PHY via GPIO0.

See https://docs.espressif.com/projects/esp ... ac-and-phy and https://docs.espressif.com/projects/esp ... -selection for more information regarding clocks.

[xien551]

Ou, I see. I'll check that README and consider updating. Thanks for mentioning it. Anyway, there are several options how to connect the REFCLK:
1) External Clock wired to GPIO0 (generated by external oscillator or by PHY).
2) Internal Clock which is generated by ESP32 and provided to PHY via GPIO16/17. Be careful here though since some ESP modules have these already occupied by SPI memory (ESP-WROVER for example).
3) Internal Clock which is generated by ESP32 and provided to PHY via GPIO0.
---------------------------------------------------------
Hey ondrej, since my DP83848 module only support the external clock, 2) and 3) is test.


2) For output clock throught gpio17, I have the following information.
------------------------------------------------------------------------
I (397) eth_example: Ethernet Started
I (8397) eth_example: Ethernet Link Up
I (8397) eth_example: Ethernet HW Addr 24:0a:c4:81:4a:93
I (10397) eth_example: Ethernet Link Down
I (12397) eth_example: Ethernet Link Up
I (12397) eth_example: Ethernet HW Addr 24:0a:c4:81:4a:93
I (18397) eth_example: Ethernet Link Down
I (24397) eth_example: Ethernet Link Up
I (24397) eth_example: Ethernet HW Addr 24:0a:c4:81:4a:93
I (28397) eth_example: Ethernet Link Down


3) for gpio0 output clk, I think the the gdb serial ouput is occuppied.
----------------------------------------------------------------------------
--- WARNING: GDB cannot open serial ports accessed as COMx
--- Using \\.\COM5 instead...
--- idf_monitor on \\.\COM5 115200 ---
--- Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H ---
ets Jun 8 2016 00:22:57

rst:0x1 (POWERON_RESET),boot:0x3 (DOWNLOAD_BOOT(UART0/UART1/SDIO_REI_REO_V2))
waiting for download

[xien551]

I have measured the output of gpio17, and there is a 50MHz output signal.

And I just don't understand why the Lan8720 could work without conection to refclk.

[ESP_ondrej]

What exact DP83848 module and what exact ESP32 module do you use?

Regarding your issue with GPIO0 CLK out. GPIO0 is also used as bootstrap pin. Therefore, when you connect something to it and you don't ensure proper logic level at this input during power up, the ESP32 may enter download mode. And that's exactly what happened to you.

[xien551]

the DP83848 module is made by Waveshare.

The Esp32 module is made by Ai-thinker: ESP32-S CE0890.

[ESP_ondrej]

"And I just don't understand why the Lan8720 could work without conection to refclk."

Does your LAN8720 module have its own CLK? Did you configured ESP32 REFCLK as output in Kconfig? If so, you might be just lucky that you had two source of clocks which are not connected in any way but they were somehow luckily synchronized and everithing worked. If you told me such story year ago, I wouldn't believe you. But I witnessed such behavior on my own eyes recently My colleague played with similar modules and he did the same mistake and it really worked! However, it was just a lucky coincidence...