Can only program ESP32 once

[bkastrup]

Hi all,
I'm building a board very similar to common ESP32 development systems (such as the LilyGO VGA32), but which uses an ESP32-PICO-D4 core, not a shielded system. It also doesn't have the SENSOR capacitors. See diagram attached. 5V, D+ and D- come from the USB port, as usual.
I can program a blank ESP32 on this board without problems, at full USB speed.
But if I try to program it again, the host PC fails to connect to the ESP32 and ultimately gives up because it doesn't receive 'header package' or something.
This very same thing happened to me once with a LilyGO VGA32 system. But in my boards it happens every single time, after programing the ESP32 once.
Do you know what's going on?
Cheers, B.

[bkastrup]

Answering my own question, I managed to 'unbrick' the ESP32 (i.e. upload new sketches) by pulling IO0 (I/O zero) down with 10K Ohm. Apparently, Q1 is not sinking current strongly enough to counter the ESP32's internal pull-up on IO0 after the ESP32 is programmed the first time. According to the specs, it should, but anyway. Does anyone see a problem in keeping IO0 pulled down by 10K?

[ESP_Sprite]

Hm, that's odd; the pullup is in the range of 50K or so; something that transistor should easily be able to overcome. What I'm not seeing in your schematic is a RC-network on the EN input of the ESP32; is it simply out of view or did you not put one in?

[bkastrup]

What I'm not seeing in your schematic is a RC-network on the EN input of the ESP32; is it simply out of view or did you not put one in?

No, there isn't one; there's just an open-collector RST/EN network. The reset button connected to RST/EN has a capacitor and charging resistor for delay purposes; is that what you mean?

[ESP_Sprite]

You need a RC circuit on that pin; it's mandatory for power-on reset, but it also acts as a delay circuit of sorts to maintain the chip resets when the DTR/RTS dance to put the chip into download mode is done. Check the note under section 2.2.1 of the hardware design guidelines as a reference.

[bkastrup]

There is a delay circuit there for reset, of course. If that's what you meant by an 'RC network,' yes, it's there.

[boarchuz]

Check IO2 (eZ80TxD) too. 0 and 2 must both be low for download mode.