Interrupts on GPIO

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Hi,

Based on the array GPIO_PIN_MUX_REG in this source file, it seems any GPIO, including the input-only pins, can be used as an interrupt source, which is great. It also seems that any interrupt can be set either level or edge triggered using gpio_set_intr_type.

However, section 2.3.2 of the Technical Reference Manual shows that there are only four edge-triggered interrupts available per CPU, for a total of eight. If this is the case, I think you should add this limitation to the source documentation.

Lastly, where in the docs can I find the minimum pulse width for interrupt signals?

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Anyone? I'd really appreciate some feedback on these two questions.

[WiFive]

viewtopic.php?t=1130

The fact that there are only four edge-triggered CPU interrupts is independent from edge-triggered gpio peripheral interrupts. It doesnt mean you can only have 4 pins set to trigger on an edge. Probably you want the CPU interrupt associated with the combined gpio peripheral interrupt to be level type anyway since you may get overlapping interrupts.

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Thanks