ESP32-C3 Custom Board WiFi not working [SOLVED]

[arnytrty]

Hello, I recently create small board with ESP32-C3, but now when I am testing it, i found out wifi is not working correctly.

When I tried create softAP, nothing showed. I can scan the networks and see them, but when I tried connecting to one, it failed.

I got this error once when I was trying softAP example:

Code: Select all

W (460) phy_init: failed to load RF calibration data (0x1102), falling back to full calibration

I added 10uF capacitor to VDD3P3 and tried again:

This is whole log when I was trying the softAP example:

Code: Select all

ESP-ROM:esp32c3-api1-20210207
Build:Feb  7 2021
rst:0x1 (POWERON),boot:0xd (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fcd6100,len:0x16b4
load:0x403ce000,len:0x930
load:0x403d0000,len:0x2d40
entry 0x403ce000
I (30) boot: ESP-IDF v4.4 2nd stage bootloader
I (30) boot: compile time 17:53:24
I (30) boot: chip revision: 3
I (32) boot.esp32c3: SPI Speed      : 80MHz
I (36) boot.esp32c3: SPI Mode       : DIO
I (41) boot.esp32c3: SPI Flash Size : 4MB
I (46) boot: Enabling RNG early entropy source...
I (51) boot: Partition Table:
I (55) boot: ## Label            Usage          Type ST Offset   Length
I (62) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (70) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (77) boot:  2 factory          factory app      00 00 00010000 00100000
I (85) boot: End of partition table
I (89) esp_image: segment 0: paddr=00010020 vaddr=3c080020 size=132f0h ( 78576) map
I (109) esp_image: segment 1: paddr=00023318 vaddr=3fc8e200 size=02b4ch ( 11084) load
I (112) esp_image: segment 2: paddr=00025e6c vaddr=40380000 size=0a1ach ( 41388) load
I (123) esp_image: segment 3: paddr=00030020 vaddr=42000020 size=74a60h (477792) map
I (198) esp_image: segment 4: paddr=000a4a88 vaddr=4038a1ac size=03f20h ( 16160) load
I (202) esp_image: segment 5: paddr=000a89b0 vaddr=50000010 size=00010h (    16) load
I (209) boot: Loaded app from partition at offset 0x10000
I (216) boot: Disabling RNG early entropy source...
I (227) cpu_start: Pro cpu up.
I (236) cpu_start: Pro cpu start user code
I (236) cpu_start: cpu freq: 160000000
I (236) cpu_start: Application information:
I (238) cpu_start: Project name:     wifi_softAP
I (244) cpu_start: App version:      1
I (248) cpu_start: Compile time:     Feb 13 2022 17:52:58
I (254) cpu_start: ELF file SHA256:  d420a79ce26dae7d...
I (260) cpu_start: ESP-IDF:          v4.4
I (265) heap_init: Initializing. RAM available for dynamic allocation:
I (272) heap_init: At 3FC94CB0 len 0002B350 (172 KiB): DRAM
I (278) heap_init: At 3FCC0000 len 0001F060 (124 KiB): STACK/DRAM
I (285) heap_init: At 50000020 len 00001FE0 (7 KiB): RTCRAM
I (292) spi_flash: detected chip: generic
I (296) spi_flash: flash io: dio
I (301) sleep: Configure to isolate all GPIO pins in sleep state
I (307) sleep: Enable automatic switching of GPIO sleep configuration
I (314) cpu_start: Starting scheduler.
I (326) wifi softAP: ESP_WIFI_MODE_AP
I (326) pp: pp rom version: 9387209
I (326) net80211: net80211 rom version: 9387209
I (346) wifi:wifi driver task: 3fc9d950, prio:23, stack:6656, core=0
I (346) system_api: Base MAC address is not set
I (346) system_api: read default base MAC address from EFUSE
I (356) wifi:wifi firmware version: 7679c42
I (356) wifi:wifi certification version: v7.0
I (356) wifi:config NVS flash: enabled
I (366) wifi:config nano formating: disabled
I (366) wifi:Init data frame dynamic rx buffer num: 32
I (376) wifi:Init management frame dynamic rx buffer num: 32
I (376) wifi:Init management short buffer num: 32
I (386) wifi:Init dynamic tx buffer num: 32
I (386) wifi:Init static tx FG buffer num: 2
I (386) wifi:Init static rx buffer size: 1600
I (396) wifi:Init static rx buffer num: 10
I (396) wifi:Init dynamic rx buffer num: 32
I (406) wifi_init: rx ba win: 6
I (406) wifi_init: tcpip mbox: 32
I (406) wifi_init: udp mbox: 6
I (416) wifi_init: tcp mbox: 6
I (416) wifi_init: tcp tx win: 5744
I (426) wifi_init: tcp rx win: 5744
I (426) wifi_init: tcp mss: 1440
I (426) wifi_init: WiFi IRAM OP enabled
I (436) wifi_init: WiFi RX IRAM OP enabled
I (446) phy_init: phy_version 907,3369105-dirty,Dec  3 2021,14:55:12
I (486) wifi:mode : softAP (34:b4:72:0c:cf:69)
I (486) wifi:Total power save buffer number: 16
I (486) wifi:Init max length of beacon: 752/752
chan:1,max_power:80
chan:2,max_power:80
chan:3,max_power:80
chan:4,max_power:80
chan:5,max_power:80
chan:6,max_power:80
chan:7,max_power:80
chan:8,max_power:80
chan:9,max_power:80
chan:10,max_power:80
chan:11,max_power:80
chan:12,max_power:80
chan:13,max_power:80
chan:14,max_power:80
I (516) wifi:Init max length of beacon: 752/752
I (516) wifi softAP: wifi_init_softap finished. SSID:TestAP password:TestPassword channel:1

What am I missing? Maybe I have the matching circuit wrong? Because It looks like I am able to receieve signals but cant send anything and that could be because of badly matched impedances (which would mean some power would come back to esp32c3). Is there any way to measure it internally? In works I could probably get my hands on some spectral analyzers, or I have SDR (HackRF One).

You can find whole project on github:
https://github.com/arnytrty/devc3
Also board files:
https://oshwlab.com/trty69230/devc3

[ESP_Sprite]

That output looks perfectly happy, and that calibration message you initially got is fully expected. That would make me think the problem could be in your hardware, but I'm unfortunately not a RF magician, so I can't really comment on that.

[arnytrty]

That output looks perfectly happy, and that calibration message you initially got is fully expected. That would make me think the problem could be in your hardware, but I'm unfortunately not a RF magician, so I can't really comment on that.

Thank you for response, sadly I am not too.

[arnytrty]

For any rf magitian out there:

On board:
https://github.com/arnytrty/devc3
https://oshwlab.com/trty69230/devc3


This is datasheet of the antenna:
https://datasheet.lcsc.com/lcsc/2002241 ... 484541.pdf


I calculated lowpass pi match network using this website:
https://home.sandiego.edu/~ekim/e194rfs ... cher2.html


This website gave the same results and also have a nice graph:
https://www.eeweb.com/tools/pi-match/

[ESP_Sprite]

Still a RF noob here, but I'm wondering: you haven't taken any parasitic capacitance into account, and I could see e.g. the cap closest to the ESP32 ending up a bit bigger because of the parasitic capacitance to the ground plane, which could make the filter network peak shift to the left... Could be that simply lowering that cap by 1pf or so solves your problem. (I think the proper approach would mean using a VNA or something, but hey...)

[Gary_W]

I am no RF magician, but I will be happy to contribute my advice, which I assure you is worth exactly what I charge for it! I very much hope you are able to get your board working (partly out of sympathy with you, and partly out of selfishness because I am about to embark on a vaguely similar project to yours, and I fear running into the same issue.)

Your matching network looks fine to me in the schematic (also, I'm curious where you found the 35+10jΩ source impedance value... I wasn't able to figure that out from the ESP32-C3 data sheets I read). However, I am slightly suspicious of the layout... it mostly matches the recommendations in the ESP32 and antenna datasheets, although I see your board has less than 2 mm clearance between the antenna and the ground plane, while the data sheet suggests at least 4 mm. You are also missing the via fence shown in the data sheet example.

But my biggest concern is the ground plane layout on the grounded side of the 4.7 pF capacitor. I don't see any vias in that copper pour except the USB connector, so any current through that capacitor will be flowing to the other end of the board and back (which is a long distance relative to the wavelength at 2.45 GHz). I suggest adding more vias as close as possible, and verifying there are short and direct ground current paths throughout the grounded sides of C12, C13, the ESP32 pad, and the ground plane directly below the feedline.

I'm afraid I don't really have enough expertise to give an exact prediction of the consequences, but I do think that the importance of the via at C12 falls somewhere in between "yeah, in theory it would be good practice to include it" and "leaving it out could cause the radio to fail". Hopefully somebody else can give a more informed opinion. I am eager to hear how your project works out, and wish you all the best with it!

Gary.

[arnytrty]

Hey everyone.
In the first place I want to thank you both for mentioning this problem. I totally forgot to add that via there. Before I read your posts I was in work and asked few pepole out there and they mentioned the same thing. I am feeling totally dumb because its so obvious but I wasnt able to see there is via missing..

As for the result I moved the cap C12 to the ground pin of C4, so now both C12 and C13 share the same ground (this is how I should design it from start), and IT WORKS.

Both connecting to WiFi and creating AP.

Lesson at least for me (and maybe for others) is to dont forget stuff XD and also never underestimate the weird laws of the universe.
I also found two more things that could help to others:
1. I used pretty different values than calculated (I think i could get closer)
2. The % of those caps and inductor and in 10%, that mean piece to piece can vary.

Once more thank you both for responding and hinting me to the right place. For Gary_W, I understand. Best is to learn from others for their money XDD (i mean it in good). The 35+j10 from this post:
viewtopic.php?t=21649
Good luck with your project and hopefully you dont fall to same pit as I.

I will create v1.1 in the nearest future, so if you want, link to project is above.

[Gary_W]

That's fantastic news!! A working board, a little bit of education (even if it's just a reminder of what you already knew), a fix that's not excessively painful to apply, and now everybody reading this thread can be a bit more confident of getting it right the next time around.

Thank you for the pointer to where the source impedance is specified... I had browsed through the ESP32-C3 docs looking for that figure, but it didn't occur to me to try reading the generic ESP32 things.

Congratulations and thanks!

Gary.

[Reverea]

1. I used pretty different values than calculated (I think i could get closer)
2. The % of those caps and inductor and in 10%, that mean piece to piece can vary.

Hey all, I know that this thread has been dead for around a year but I was hoping you might be around still to provide some insight into a problem I am having!

I have nearly an identical circuit to yours on my custom PCB. ESP32-C3 going into a 4.7pf, 2NH, 3.3pf matching circuit, with a nearly identical chip antenna. I'm having the same issue you originally had where you can see networks but can't connect! Do you remember what values you changed your matching circuit to like you mentioned in your post? I don't really know what direction to start!

[beckmx]

1. I used pretty different values than calculated (I think i could get closer)
2. The % of those caps and inductor and in 10%, that mean piece to piece can vary.

Hey all, I know that this thread has been dead for around a year but I was hoping you might be around still to provide some insight into a problem I am having!

I have nearly an identical circuit to yours on my custom PCB. ESP32-C3 going into a 4.7pf, 2NH, 3.3pf matching circuit, with a nearly identical chip antenna. I'm having the same issue you originally had where you can see networks but can't connect! Do you remember what values you changed your matching circuit to like you mentioned in your post? I don't really know what direction to start!

I would also like to know