ESP32S2 custom dev board design, schematic check please

[fasani]

Hi there,
I wanted to design an open source dev board for the S2 WROVER that exposes all pins (In my design all except IO0 are there)

This is the schematic v1: https://github.com/martinberlin/H-S2-wr ... EMATIC.pdf

Minimum requirements for my design:

Lipo charger and a 2 leds indicator (charge, full)
All GPIOs exposed
No Serial-to-UART. Only dfu USB, please check this blog post from Espressif

I'm not 100% sure how is to flash a board using DFO for the first time. But I would like to try out doing a board without the need for a USB-to-UART chip.
Note: I'm kind of a newbie with Kicad and I just started one month ago, so be easy on me!

Can anyone give it a short review?

[boarchuz]

• Could use some more capacitance, especially either side of the LDO and ESP32 VCC
• Need a ~1uF capacitor on ESP32 EN
• Suggest grounding the pad of TP4056
• Suggest a reasonably high resistor (eg. 10-100k) on VBUS to GND, in order to tie TPS2113 VSNS low when VBUS is disconnected
• There's no protection on USB (ESD, series resistors); it's up to you how necessary that is

[fasani]

Thanks a lot, will modify it and upload it here again.
This is more or less the components distribution

[ESP_Sprite]

With regards to the component placement, be sure to follow our hardware design guidelines, especially the bit about module placement (which you seem to do right) and the need for a keepout zone under the antenna. You don't want a ground plane messing up your reception.

[fasani]

Thanks ESP_Sprite,
I will give a good read to that. I see that some boards directly cut the PCB around the antenna. But if I get it right, the only requirements of the Keep out area is that there are no cooper traces or GND panes around the area. It's not a requirement to cut the PCB I guess, although I could also do it, will redesign it and post it here before sending some to JLPCB. My goal is to test this DFO flashing / debugging and ultimately make a EPDiy S2 epaper controller with reduced components (Probably with the help of more experienced developers, otherwise nothing will work )

[ESP_Sprite]

But if I get it right, the only requirements of the Keep out area is that there are no cooper traces or GND panes around the area.

I think both are allowed, I don't think the dielectric difference between PCB material and air is such that it makes a large difference. Just don't put anything conductive there.