panic unhandled break instruction

f.h-f.s.
Posts: 215
Joined: Thu Dec 08, 2016 2:53 pm

Re: panic unhandled break instruction

Postby f.h-f.s. » Mon May 15, 2017 7:31 am

I am running code ONLY on CPU0, and I only use the ESP_LOGx() functions.
I do call esp_log in gap_ble callbacks and wifi event handler.

How should I be logging from callbacks?

ESP_igrr
Posts: 2072
Joined: Tue Dec 01, 2015 8:37 am

Re: panic unhandled break instruction

Postby ESP_igrr » Mon May 15, 2017 11:05 am

No, these callbacks are not from ISRs (so logging there should be okay).

The backtrace actually looks very similar to a bug which we are troubleshooting now. Could you please check if you have "Run FreeRTOS on first core only" option enabled in menuconfig (Component config > FreeRTOS)? If it is not enabled, could you please try again having enabled it?

f.h-f.s.
Posts: 215
Joined: Thu Dec 08, 2016 2:53 pm

Re: panic unhandled break instruction

Postby f.h-f.s. » Mon May 15, 2017 1:04 pm

It's already Unicore. I also disabled CPU1 cache.

Code: Select all

# CONFIG_MEMMAP_SMP is not set
CONFIG_FREERTOS_UNICORE=y

ESP_igrr
Posts: 2072
Joined: Tue Dec 01, 2015 8:37 am

Re: panic unhandled break instruction

Postby ESP_igrr » Mon May 15, 2017 2:29 pm

Does this happen with one of the ESP-IDF examples? If not, can you share the code to reproduce this issue?

f.h-f.s.
Posts: 215
Joined: Thu Dec 08, 2016 2:53 pm

Re: panic unhandled break instruction

Postby f.h-f.s. » Tue May 16, 2017 7:30 am

I have a hard time reproducing this problem, I will post back when I have more information or when I am able to reproduce.

f.h-f.s.
Posts: 215
Joined: Thu Dec 08, 2016 2:53 pm

Re: panic unhandled break instruction

Postby f.h-f.s. » Fri Jun 16, 2017 5:42 pm

I am able to reproduce this by generating input in idf_monitor.

Today especially I was having alot of them, maybe because I was testing alot.
Then I remembered reading https://github.com/espressif/esp-idf/issues/688
So I guess that is the cause. The uart0 rx interrupt.

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