ESP32-S3 LCD and I2S FULL documentation

Baldhead
Posts: 468
Joined: Sun Mar 31, 2019 5:16 am

Re: ESP32-S3 LCD and I2S FULL documentation

Postby Baldhead » Fri Nov 26, 2021 5:10 pm

Hi @ESP_Sprite,

I want to use "esp32-s3 hw_lcd" with internal or external ram memory with dma.

I am writing a specific driver (not a generic driver) for a lcd, at first using an 8-bit parallel i8080 bus with RGB565(two writes in the i8080 bus is equal to one pixel).
I will use two buffers for rendering.
I will use dma to transfer the buffers from ram(internal or external) to "esp32-s3 hw_lcd internal module" .
I want to test with internal ram and spiram memory, to see the lcd refresh speed.
With spiram i can have two full display buffers, but i don't know if it's the best strategy because of the buffers rendering speed and the transfer speed to display (cache problem maybe).
With static internal ram i can have two partial display buffers (2 buffers with 1/8 display size for example), i think it's faster.

While one display buffer is being rendered the other display buffer is being sent to the physical display by dma.

In the esp32, my i2s0 lcd driver is working fine.

ESP_Sprite
Posts: 9764
Joined: Thu Nov 26, 2015 4:08 am

Re: ESP32-S3 LCD and I2S FULL documentation

Postby ESP_Sprite » Sat Nov 27, 2021 2:21 am

Honest question: given the state of affairs, wouldn't it be easier to take the i8080 example from the esp-lcd component and modify that to do what you want to do? It should have all the underlying logic wrt DMA transfers etc already. Asking because I had a similar issue (specifically I wanted to drive an ancient monochrome EL screen using the RGB output) and that turned out to be the easiest way to get stuff going.

Baldhead
Posts: 468
Joined: Sun Mar 31, 2019 5:16 am

Re: ESP32-S3 LCD and I2S FULL documentation

Postby Baldhead » Wed Dec 01, 2021 8:22 pm

Hi,

Which is the LCD_CAM peripheral register and bit equivalent to "I2S0.state.tx_idle" ???

Baldhead
Posts: 468
Joined: Sun Mar 31, 2019 5:16 am

Re: ESP32-S3 LCD and I2S FULL documentation

Postby Baldhead » Wed Dec 01, 2021 9:25 pm

Hi,

Are hw_lcd peripheral bidirectional io ?

I can write and read from external lcd bus ?

ESP_Sprite
Posts: 9764
Joined: Thu Nov 26, 2015 4:08 am

Re: ESP32-S3 LCD and I2S FULL documentation

Postby ESP_Sprite » Thu Dec 02, 2021 3:56 am

No, sorry, from what the docs tell me the LCD port is write-only. If you want to read, you'd probably need to bitbang the GPIOs manually.

Baldhead
Posts: 468
Joined: Sun Mar 31, 2019 5:16 am

Re: ESP32-S3 LCD and I2S FULL documentation

Postby Baldhead » Thu Dec 02, 2021 4:54 pm

Baldhead wrote:
Wed Dec 01, 2021 8:22 pm
Hi,

Which is the LCD_CAM peripheral register and bit equivalent to "I2S0.state.tx_idle" ???
@ESP_Sprite

Could you inform me about this ?

Thank's.

Baldhead
Posts: 468
Joined: Sun Mar 31, 2019 5:16 am

Re: ESP32-S3 LCD and I2S FULL documentation

Postby Baldhead » Thu Dec 02, 2021 8:43 pm

Hi @ESP_Sprite,

I need to globally declare this variable "gdma_dev_t GDMA" ?
The program compiles declaring and not declaring this variable.

I need to globally declare this variable "lcd_cam_dev_t LCD_CAM" ?
The program compiles declaring and not declaring this variable.

The strange thing is that both structures are declared external.

gdma_struct.h
extern gdma_dev_t GDMA;

lcd_cam_struct.h
extern lcd_cam_dev_t LCD_CAM;

Thank's.

ESP_Sprite
Posts: 9764
Joined: Thu Nov 26, 2015 4:08 am

Re: ESP32-S3 LCD and I2S FULL documentation

Postby ESP_Sprite » Fri Dec 03, 2021 2:14 am

Those 'variables' are created in the linker script; they always point to the hardware registers of those peripherals.

For tx_idle, you can probably use the LCD_CAM_LCD_TRANS_DONE_INT interrupt. If you want to poll it, I think it's enough simply to not enable the interrupt and use the status register to see if it's done. Make sure to clear it before you start a new transaction.

Baldhead
Posts: 468
Joined: Sun Mar 31, 2019 5:16 am

Re: ESP32-S3 LCD and I2S FULL documentation

Postby Baldhead » Fri Dec 03, 2021 8:55 pm

ESP_Sprite wrote:
Thu Dec 02, 2021 3:56 am
No, sorry, from what the docs tell me the LCD port is write-only. If you want to read, you'd probably need to bitbang the GPIOs manually.
Maybe changing to CAM input(CAM_DATA_IN0_IDX, CAM_DATA_IN1_IDX, ....).

But switching from LCD to CAM and CAM to LCD can be slow(i dont know).

And there is the hassle to program all this :)

Baldhead
Posts: 468
Joined: Sun Mar 31, 2019 5:16 am

Re: ESP32-S3 LCD and I2S FULL documentation

Postby Baldhead » Mon Dec 06, 2021 9:44 pm

Hi @ESP_Sprite,

How i can send command + parameters(before send pixels) to the lcd in the hw_lcd peripheral ?

Does hw_lcd peripheral have fifo buffer ?
If yes ? What size ? Example: 32 positions with 32 bits each position.
I can set this position size ? If yes. Works in dma mode and not dma mode ?

How to know if the hw_lcd peripheral fifo tx are full ?
How to know how many fifo places are full or are empty ?
Can i read some empty places tx fifo counter ?
Or, can i read some full places fifo tx counter ?
Example: 32 fifo positions. 10 filled and 22 empty.

Microchip example: TXBUFELM<4:0>: Transmit Buffer Element Count bits (valid only when ENHBUF = 1).

Code: Select all

    
while( SPI1STATbits.TXBUFELM > 4 );
SPI1BUF = 0b1111111111000000;  
i want to do something like this:

Code: Select all

inline void hw_lcd_write_command( uint32_t command )
{
    LCD_CAM.lcd_misc.lcd_cd_cmd_set = 0;  // R/W; bitpos: [30]; default: 0. 1: LCD_CD = !reg_cd_idle_edge when lcd_st[2:0] is in LCD_CMD state. 0: LCD_CD = reg_cd_idle_edge.
    LCD_CAM.lcd_cmd_val.lcd_cmd_value = command;  // lcd_cmd_value : R/W; bitpos: [31:0]; default: 0. The LCD write command value.
}


// write parameters(8 bits mode)
inline void hw_lcd_write_data( uint8_t* dt, uint32_t size )
{
    LCD_CAM.lcd_misc.lcd_cd_cmd_set = 1;  // R/W; bitpos: [30]; default: 0. 1: LCD_CD = !reg_cd_idle_edge when lcd_st[2:0] is in LCD_CMD state. 0: LCD_CD = reg_cd_idle_edge.

    for( uint32_t i = 0 ; i < size ; i++ )
    {       
        // while( SPI1STATbits.SPITBF );  // microchip spi fifo status bit in enhanced buffer mode.
        
        LCD_CAM.lcd_cmd_val.lcd_cmd_value = dt[i];  // lcd_cmd_value : R/W; bitpos: [31:0]; default: 0. The LCD write command value.                                                                     // Write the data out to the hw_lcd peripheral.
    }
}


// write pixels(16 bits mode)
inline void hw_lcd_write_data( uint16_t* dt, uint32_t size )
{
    LCD_CAM.lcd_misc.lcd_cd_cmd_set = 1;  // R/W; bitpos: [30]; default: 0. 1: LCD_CD = !reg_cd_idle_edge when lcd_st[2:0] is in LCD_CMD state. 0: LCD_CD = reg_cd_idle_edge.

    for( uint32_t i = 0 ; i < size ; i++ )
    {       
        // while( SPI1STATbits.SPITBF );  // microchip spi fifo status bit in enhanced buffer mode.
        
        LCD_CAM.lcd_cmd_val.lcd_cmd_value = dt[i];  // lcd_cmd_value : R/W; bitpos: [31:0]; default: 0. The LCD write command value.                                                                     // Write the data out to the hw_lcd peripheral.
    }
}
Microchip datasheet:

SPITBF: SPI Transmit Buffer Full Status bit
1 = Transmit not yet started, SPITXB is full
0 = Transmit buffer is not full
Standard Buffer Mode:
Automatically set in hardware when the core writes to the SPIBUF location, loading SPITXB.
Automatically cleared in hardware when the SPI module transfers data from SPITXB to SPISR.
Enhanced Buffer Mode:
Set when CWPTR + 1 = SRPTR; cleared otherwise
Attachments
fifo_example.png
fifo_example.png (38.35 KiB) Viewed 146079 times
Last edited by Baldhead on Mon Dec 06, 2021 11:03 pm, edited 1 time in total.

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