Here We Go: Release 1st Sept.

[WiFive]

https://mobile.twitter.com/EspressifSys ... 2214535168

Release 1st Sept.

Things are happening! Not sure exactly what "release" means, maybe first chips shipping, add to taobao store?

[rudi ;-)]

txs!
..what we do without you..
txs!

240 ( 220 ? ) MHz CPU clock - fine

one think over: ESP32-wRover ( think he mean wifi Rover )
does John Lee mean with "4 MByte of SRAM" the extern possible from a SRAM over (h)SPI ? or mistake and 4 MBit ?

[WiFive]

does John Lee mean with "4 MByte of SRAM" the extern possible from a SRAM over (h)SPI ? or mistake and 4 MBit ?

Yes I think so, external ram. Flash and SRAM can both be used with cache.

[rudi ;-)]

does John Lee mean with "4 MByte of SRAM" the extern possible from a SRAM over (h)SPI ? or mistake and 4 MBit ?

Yes I think so, external ram. Flash and SRAM can both be used with cache.

have thinked so,too. txs for confirm. i was little unsure what he mean.

nice 'accelerator's datasheet - one thing is not on the list just in time - hope for the 'CAN' Controller implant
think we need for receive/send datatelegram one extern transceiver like MCP2551 or the TJA1050..
what you mean about the 'CAN' Controller implant ?

[nicolaswzk]

good news
Where to go on sale?

[rudi ;-)]

good news
Where to go on sale?

hi
option 1
option 2

best wishes
rudi

[rudi ;-)]

we have 3x I2C in the ESP32 release?
( beta was/is 2xI2C )

3 x UARTs, including hardware flow control
3 x SPI
2 x I2S
12 x ADC input channels
2 x DAC
2 x I2C <<<<<<<<<<<<<<<<<<<<<<<<<<<<<
PWM/timer input/output availabe on every GPIO pin
OpenOCD debug interface with 32 kB TRAX buffer
SDIO master/slave 50 MHz
Supports external SPI flash up to 16 MB
SD-card interface support

in datasheet 2x I2C too

i2c-esp32.png (24.92 KiB) Viewed 15642 times

wide supply volt range operation changed

2.2V to 3.6V operating voltage

to

2.0 to to 3.6V operating voltage

SRAM changed

Integrated 520 KB SRAM

to

512 kByte SRAM

and DMIPS changed

600 DMIPS

to

"link twitter"
..What will you do with 650 DMIPS? *drum roll*..

We have 650 DMIPS?

fine!

[WiFive]

does John Lee mean with "4 MByte of SRAM" the extern possible from a SRAM over (h)SPI ? or mistake and 4 MBit ?

Yes I think so, external ram. Flash and SRAM can both be used with cache.

have thinked so,too. txs for confirm. i was little unsure what he mean.

Now where can we find 32mbit serial SRAM??

[rudi ;-)]

Yes I think so, external ram. Flash and SRAM can both be used with cache.

have thinked so,too. txs for confirm. i was little unsure what he mean.

Now where can we find 32mbit serial SRAM??

i think we do this from spi slave contected SPI Flash

have a look: CY62177EV30LL-55ZXI ( parallel )
SRAM 32Mb 3V 55ns 2M x 16 LP SRAM

option 2

- Micro SD cards are serial interface and only need a couple of control lines.

- You can always bit-bang a parallel bus. To safe pins you could use 74xx595 shift registers to make the address lines

- Option 3

-Option 4

[johnlee]

about the supply voltage range. the main issue is not with ESP32, but with the flash chips which usually runs off 3.3V, with the exception of some vendors which went as low as 2.2V. with ESP32, we decided to try using 1.8V flash; hence we can now go to 2.0V.