GPIO gives Multiple Interrupt events for single interrupt generation

[Hans Dorn]

You could do a quick check directly in the ISR if the last event has been too recent, and ignore the new interrrupt in this case.

[Ritesh]

You could do a quick check directly in the ISR if the last event has been too recent, and ignore the new interrrupt in this case.

Yes. But that is work around solution that I have already thought to do it as I have did it into other controller as well before.

But, I just want to find out why it is happening and what is exact root cause for that?

[at-ams]

Hi,
I am seeing a similar behavior. I use an opto interrupter that has a nice positive pulse output signal when the light beam is interrupted by a pin sticking to a rotating wheel. I have checked the signal with my scope and the pulse has a clean 10 uSec rising edge, no bounce effect or anything like that. Still I see so now and then double interrupts being fired. So far I have not been able to work out the reason for this behavior. To get rid of the double interrupts, I start a software timer to black put any interrupts arriving in the 40 msec after the pulse has been started, unfortunately this does not help as a 'ghost' interrupts arrive with a random delay, sometimes up to 200msec later.

Anyone any ideas?

Regards,

Ad

[Ritesh]

Hi,
I am seeing a similar behavior. I use an opto interrupter that has a nice positive pulse output signal when the light beam is interrupted by a pin sticking to a rotating wheel. I have checked the signal with my scope and the pulse has a clean 10 uSec rising edge, no bounce effect or anything like that. Still I see so now and then double interrupts being fired. So far I have not been able to work out the reason for this behavior. To get rid of the double interrupts, I start a software timer to black put any interrupts arriving in the 40 msec after the pulse has been started, unfortunately this does not help as a 'ghost' interrupts arrive with a random delay, sometimes up to 200msec later.

Anyone any ideas?

Regards,

Ad

Hi,

Right Now, Temperature Solution for that is to check interrupt status with its value in interrupt ISR call so that you will get only onetime interrupt 90% based on Positive or Negative Edge Trigger Interrupt.

Let me know if need any help in code point of view

[cyberman54]

Same problem here. I feed GPIO0 with a Squarewave signal from RTC DS3231, generating iinterrupt on falling edge. Has hardware pullup 10k to VDD. I see 2-3 interrupts on each falling edge. Checked signal with oscillopscope, it is 100% clean, but has 50 microseconds slope, maybe this is too slow?

[Ritesh]

Same problem here. I feed GPIO0 with a Squarewave signal from RTC DS3231, generating iinterrupt on falling edge. Has hardware pullup 10k to VDD. I see 2-3 interrupts on each falling edge. Checked signal with oscillopscope, it is 100% clean, but has 50 microseconds slope, maybe this is too slow?

Would you please check with logic as discussed into thread?

[cyberman54]

We can close this. I checked with digital oscilloscope and found a 100nf capacitor on the GPIO is too much. I removed the capacitor and the problem was solved.

[Ritesh]

We can close this. I checked with digital oscilloscope and found a 100nf capacitor on the GPIO is too much. I removed the capacitor and the problem was solved.

Great.

Thanks for update.