Hi everyone,
Have a good day. i am using spi and gpio interrupt for my new project. but the spi is not working when i enable the gpio interrupts. what could be the reason for this. any help would be much helpful for me.
my code :
void app_main()
{
gpio_config_t io_conf;
//configure output pins without interupt
io_conf.intr_type = GPIO_PIN_INTR_DISABLE;
io_conf.mode = GPIO_MODE_OUTPUT;
io_conf.pin_bit_mask = (1<<SPISTE);
io_conf.pull_down_en = 0;
io_conf.pull_up_en = 0;
gpio_config(&io_conf);
io_conf.intr_type = GPIO_PIN_INTR_POSEDGE;
io_conf.pin_bit_mask = (1<<SPIDRDY);;
io_conf.mode = GPIO_MODE_INPUT;
io_conf.pull_up_en = 1;
gpio_config(&io_conf);
//gpio_set_intr_type(SPIDRDY, GPIO_INTR_POSEDGE);
gpio_evt_queue = xQueueCreate(10, sizeof(uint32_t));
xTaskCreate(gpio_task_example, "gpio_task_example", 2048, NULL, 10, NULL);
gpio_install_isr_service(ESP_INTR_FLAG_DEFAULT);
gpio_isr_handler_add(SPIDRDY, gpio_isr_handler, (void*) SPIDRDY);
spi_device_handle_t spi;
esp_err_t ret;
spi_bus_config_t buscfg=
{
.miso_io_num=SOMI,
.mosi_io_num=SIMO,
.sclk_io_num=SCLK,
.quadwp_io_num=-1,
.quadhd_io_num=-1
};
spi_device_interface_config_t devcfg={
.clock_speed_hz=2000000, //Clock out at 2 MHz
.mode=0, //SPI mode 0
.spics_io_num=CS, //CS pin
.queue_size=7, //We want to be able to queue 7 transactions at a time
};
ret=spi_bus_initialize(HSPI_HOST, &buscfg, 1);
assert(ret==ESP_OK);
ret=spi_bus_add_device(HSPI_HOST, &devcfg, &spi);
assert(ret==ESP_OK);
int cnt = 0;
int level=0;
while(1) {
gpio_set_level(SPISTE, LOW);
unsigned long data_out=CONTROL0;
uint32_t data= 0x000008;
data_out=((data_out<<24) & 0xFF);
data_out=(data_out | data);
spi_transaction_t t;
memset(&t, 0, sizeof(t));
t.length=32; //Command is 8 bits
t.tx_buffer=&data_out;
t.user=(void*)0;
ret=spi_device_transmit(spi, &t); //Transmit!
assert(ret==ESP_OK);
gpio_set_level(SPISTE, HIGH);
printf("cnt: %d\n", cnt++);
vTaskDelay(100 / portTICK_RATE_MS);
//gpio_set_level(SPISTE, level);
//level=!level;
}
}
gpio interrupt conflicts with spi
gpio interrupt conflicts with spi
Last edited by joicetm on Tue Apr 25, 2017 12:58 pm, edited 4 times in total.
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Re: gpio interrupt conflicts with spi
Hi joicetm
I have 3 gpios as inputs in interrupt, 3 spi devices in chain, 2 i2c devices in chain and all works fine. GPIOs interrupts at 300 usecs. Very fast.
Reading your code, It may be that the start of app_main is a little messy probably of trying everything out of frustration
It seems u want gpio SPIDRDY as a source of Interrupt, going to from LOW to HIGH (Int on HIGH)
You can define the Interrupt type directly in the config of the gpio and not use the gpio_set_intr_type, but that could be cosmetic.
What seems very strange is that u are defining an Interrupt for the SOMI(MISO) pin which is/will be OWNED by the SPI Driver.
Why are u putting an Interrupt on the SOMI? Its like indiscriminately counting ints (not even bits) of the incoming data.
Still I dont think u can set an interrupt on a SPI pin It will probably go bananas or never read data ( SOMI Slave Out Master In).
The spi Mode is not standard and I did a fast read of the AFE4490 and I found this
Do u have a Logic Analyzer? That will let u see what is going on.
BTW, cool chip the AFE4490.
Some precautions with the SPi Master.
The AFE4490 allows for MULTIPLE reads and writes, meaning instead of reading/writing one byte u could read/write 100 or whatever. This will really speed up the interface. Unluckily the SPI Master Drive,r as of today, has a bug that corrupts the Read/Write buffer after 32 bytes (internal buffer they have). So it can work but for 32 or less.
Robert.
I have 3 gpios as inputs in interrupt, 3 spi devices in chain, 2 i2c devices in chain and all works fine. GPIOs interrupts at 300 usecs. Very fast.
Reading your code, It may be that the start of app_main is a little messy probably of trying everything out of frustration
It seems u want gpio SPIDRDY as a source of Interrupt, going to from LOW to HIGH (Int on HIGH)
You can define the Interrupt type directly in the config of the gpio and not use the gpio_set_intr_type, but that could be cosmetic.
What seems very strange is that u are defining an Interrupt for the SOMI(MISO) pin which is/will be OWNED by the SPI Driver.
Why are u putting an Interrupt on the SOMI? Its like indiscriminately counting ints (not even bits) of the incoming data.
Still I dont think u can set an interrupt on a SPI pin It will probably go bananas or never read data ( SOMI Slave Out Master In).
The spi Mode is not standard and I did a fast read of the AFE4490 and I found this
That seems to be SPI Mode 0 not 1.Even though the input has hysteresis, TI recommends keeping SCLK as clean
as possible to prevent glitches from accidentally shifting the data. When the serial interface is idle, hold SCLK
low.
from https://en.wikipedia.org/wiki/Serial_Pe ... erface_Bus.At CPOL=0 the base value of the clock is zero, i.e. the idle state is 0 and active state is 1.
Do u have a Logic Analyzer? That will let u see what is going on.
BTW, cool chip the AFE4490.
Some precautions with the SPi Master.
The AFE4490 allows for MULTIPLE reads and writes, meaning instead of reading/writing one byte u could read/write 100 or whatever. This will really speed up the interface. Unluckily the SPI Master Drive,r as of today, has a bug that corrupts the Read/Write buffer after 32 bytes (internal buffer they have). So it can work but for 32 or less.
Robert.
Re: gpio interrupt conflicts with spi
thank you so much for the info.
i was out of my mind trying too much.
there was only a silly mistake on defining the pin.
sorry for the post
i was out of my mind trying too much.
there was only a silly mistake on defining the pin.
sorry for the post
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