(Reposting this as it doesn't seem to have worked last time!)
Been banging my head against the wall here for hours and have to give up, any help would be appreciated.
I have built openocd-esp32.
I have the following esp.cfg
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#
# Example configuration file to hook up an ESP32 module or board to a JTAG
# adapter. Please modify this file to your local setup.
#
#
# Include the configuration for the JTAG adapter. We use the Tian TUMPA here.
# If you have a different interface, please edit this to include the
# configuration file of yours.
source [find interface/ftdi/esp32_devkitj_v1.cfg]
# The ESP32 only supports JTAG.
transport select jtag
# The speed of the JTAG interface, in KHz. If you get DSR/DIR errors (and they
# do not relate to OpenOCD trying to read from a memory range without physical
# memory being present there), you can try lowering this.
adapter_khz 200
# With no variables set, openocd will configure JTAG for the two cores of the ESP32 and
# will do automatic RTOS detection. This can be be adjusted by uncommenting any of the
# following lines:
# Only configure the PRO CPU
#set ESP32_ONLYCPU 1
# Only configure the APP CPU
#set ESP32_ONLYCPU 2
# Disable RTOS support
#set ESP32_RTOS none
# Force RTOS to be FreeRTOS
#set ESP32_RTOS FreeRTOS
#Source the ESP32 configuration file
source [find target/esp32.cfg]
# The TDI pin of ESP32 is also a bootstrap pin that selects the voltage the SPI flash
# chip runs at. When a hard reset happens (e.g. because someone switches the board off
# and on) the ESP32 will use the current TDI value as the bootstrap value because the
# JTAG adapter overrides the pull-up or pull-down resistor that is supposed to do the
# bootstrapping. These lines basically set the idle value of the TDO line to a
# specified value, therefore reducing the chance of a bad bootup due to a bad flash
# voltage greatly.
# Enable this for 1.8V SPI flash
esp108 flashbootstrap 1.8
# Enable this for 3.3V SPI flash
#esp108 flashbootstrap 3.3
when I run ./openocd-esp32/src/openocd -s ./openocd-esp32/tcl -f ./openocd-esp32/esp32.cfg
I get:
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Open On-Chip Debugger 0.10.0-dev-g90071eb8 (2017-04-12-14:58)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
none separate
none separate
adapter speed: 200 kHz
force hard breakpoints
Info : clock speed 200 kHz
Error: JTAG scan chain interrogation failed: all ones
Error: Check JTAG interface, timings, target power, etc.
Error: Trying to use configured scan chain anyway...
Error: esp32.cpu0: IR capture error; saw 0x1f not 0x01
Warn : Bypassing JTAG setup events due to errors
Info : esp32.cpu0: Debug controller was reset (pwrstat=0xFF, after clear 0xFF).
Info : esp32.cpu0: Core was reset (pwrstat=0xFF, after clear 0xFF).
Info : esp32.cpu1: Debug controller was reset (pwrstat=0xFF, after clear 0xFF).
Info : esp32.cpu1: Core was reset (pwrstat=0xFF, after clear 0xFF).
Cheers
Andy