Hi Forum,
We are in the final design stage of a new product of ours and we have an observation regarding additional current being drawn in deep sleep mode while ULP being activated. We isolated all pins and other components on our board to verify the current consumption is coming from the ESP32-WROOM-32D (8MB) module we are using. Since GPIO9 (SPI_HD), GPIO10 (SPI_WP), GPIO11 (SPI_CS), GPIO6 (SPI_CLK), GPIO7 (SPI_DO) and GPIO8 (SPI_DI) are by design of the module used for SPI flash interaction we did not put additional focus on said pins and left them unconnected on our board.
What we observed in ULP mode is, that we can reduce the current consumption by another 15uA once we define ONE of the pins GPIO9, GPIO10, GPIO6, GPIO7 or GPIO8 to VDD. Defining GPIO11 does not make an influence. Definition from either of the pins to GND does not influence the current consumption. I defined one pin after another and measured all remaining pins voltages. Interestingly enough remaining pins settle to voltages to either 2.4Vdc or 0.0Vdc on their own. Defining multiple gpio from SPI interface to Vdd = 3.3Vdc does not make any more difference. Having the external fix to defining the gpio to 3.3Vdc by pull ups of 100k does not take influence to other flash operation (read / write) as observed from 10 samples in house.
Also not implementing the gpio isolation from the github example https://github.com/espressif/esp-idf/bl ... main.c#L81 saves us another 15uA. We also do not have external components on JTAG related pins.
Current Consumption in 500us wake-up intervals from ULP. Vdd = 3.3Vdc. Ambient Temperature = 25degC. Measured from external power supply and precision multimeter in series of current path.
- standard: 128.5uA
- removed gpio isolation: 115.4uA
- applied gpio pull-up: 102.8uA
Let me know if you have similar observations or an explanation to my observation.
Cheers
SPI flash pins cause additional current draw
SPI flash pins cause additional current draw
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Re: SPI flash pins cause additional current draw
Possibly addressed by this recent fix?
https://github.com/espressif/esp-idf/co ... f068466ab7
That was targeting light sleep, but I suppose if the ULP is waking frequently enough then it could result in a measurable increase in power consumption in deep sleep too (is VSDIO power somehow tied to RTC state?).
https://github.com/espressif/esp-idf/co ... f068466ab7
That was targeting light sleep, but I suppose if the ULP is waking frequently enough then it could result in a measurable increase in power consumption in deep sleep too (is VSDIO power somehow tied to RTC state?).
Re: SPI flash pins cause additional current draw
I did not find any time to test any newer version than esp-idf 4.2 since we are in the release cycle of our product. We're also not looking into merging the suggested fix to our build pipeline since we don't want to deviate from the release branch. Will continue with our observed fix and see where qualification gets us to. Cheers
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