I2S parallel output corrupts data?

[Crote32]

I swear I'm not going crazy.
Basically, I'm trying to use the I2S to output data in parallel. It's not very well documented, but using TobleMiner's library it's not too hard - or so I thought.
It seems to work just fine, except that my data gets corrupted. I've managed to work it down to a very simple proof-of-concept:

Code: [Select all] [Expand/Collapse]

1.     uint16_t total_count = 100
2.     uint16_t pattern_a = 0b10;
3.     uint16_t pattern_b = 0b01;
4.     for (int i = 0; i < total_count; i++) {
5.         buffer[i] = pattern_a;
6.     }
7.     uint8_t b_count = 3;
8.     for (int i = 0; i < b_count; i++) {
9.         buffer[total_count - (i + 1)] = pattern_b;
10.     }

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Basically, keep a value for a long-ish time, then change it for a short time. Quite trivial, in my opinion.

The crucial part here is the "b_count". Attached at the end are scope captures for values 1-8.

As you can see, for every odd number above 1, a spurious pulse is inserted! This happens both for a normally-low and normally-high value.

If you want to try it for yourself, I've uploaded my code in a Github repository at https://github.com/Crote/esp32-i2s-poc.

My own code is absolutely trivial, and I can't see anything obvious wrong in the I2S component either.

What is happening here? Am I missing something obvious?

[Crote32]

Well, I figured it out.

Technical reference manual, section 12.4.4. first stage configuration.

I was writing 16-bit data in Tx FIFO mode1. However, it is being read from the DMA buffer as a 32-bit word, and the 16 high-order bits are output first.
In other words, if your data is an uint16_t array, it is being output in the order [1, 0, 3, 2, 5, 4, ...], so you need to take that into account when filling your data buffer.