ESP32-S3 (Beta2) MARLIN_9_1B on ESP32-S3-Addax-1 V1.0 Specs & Datasheet

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Vader_Mester
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Re: ESP32-S3 (Beta2) MARLIN_9_1B on ESP32-S3-Addax-1 V1.0 Specs & Datasheet

Postby Vader_Mester » Tue Apr 13, 2021 7:12 am

@rudi

Do you know if uFL connector versions will come from these modules as well?

Code: Select all

task_t coffeeTask()
{
	while(atWork){
		if(!xStreamBufferIsEmpty(mug)){
			coffeeDrink(mug);
		} else {
			xTaskCreate(sBrew, "brew", 9000, &mug, 1, NULL);
			xSemaphoreTake(sCoffeeRdy, portMAX_DELAY);
		}
	}
	vTaskDelete(NULL);
}
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Re: ESP32-S3 (Beta2) MARLIN_9_1B on ESP32-S3-Addax-1 V1.0 Specs & Datasheet

Postby Vader_Mester » Wed Apr 14, 2021 12:44 pm

I just did a pin-map of the WROVER-like module on the Devboard, and I noticed, there are a lot of NC pins on it. Interestingly, I haven't found a connection between IO26 on the DevBoard and the module it self. I wonder where is it connected to.

Code: Select all

task_t coffeeTask()
{
	while(atWork){
		if(!xStreamBufferIsEmpty(mug)){
			coffeeDrink(mug);
		} else {
			xTaskCreate(sBrew, "brew", 9000, &mug, 1, NULL);
			xSemaphoreTake(sCoffeeRdy, portMAX_DELAY);
		}
	}
	vTaskDelete(NULL);
}
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Baldhead
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Re: ESP32-S3 (Beta2) MARLIN_9_1B on ESP32-S3-Addax-1 V1.0 Specs & Datasheet

Postby Baldhead » Sat Apr 24, 2021 9:17 pm

Hi @rudi,

Have you heard of QDR(Quad Data Rate) memory ?

From what i researched i only found with parallel address and parallel data and are very expensive(high performance too), with write and read independent interface for write and read at same time.

A "octal spi" with QDR would be very nice.

OR a quad spi(SQI) with QDR would be very nice too.

QDR use two clock signals with 90 degrees out of phase.
Attachments
Quad_Pumping.png
Quad_Pumping.png (6.67 KiB) Viewed 22035 times
401px-SDR_DDR_QDR.svg.png
401px-SDR_DDR_QDR.svg.png (22.3 KiB) Viewed 22035 times
Last edited by Baldhead on Mon Apr 26, 2021 2:55 am, edited 1 time in total.
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rudi ;-)
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Re: ESP32-S3 (Beta2) MARLIN_9_1B on ESP32-S3-Addax-1 V1.0 Specs & Datasheet

Postby rudi ;-) » Sun Apr 25, 2021 11:47 pm

Vader_Mester wrote: ↑
Tue Apr 13, 2021 7:12 am
 Do you know if uFL connector versions will come from these modules as well?
the mini serie contains mini-1 (PCB Ant) and mini-1U (IPEX),
also final S3 series there will been MINI module and from hearing - WROOM module -
not hearing - WROVER module -
Vader_Mester wrote: ↑
Wed Apr 14, 2021 12:44 pm
 I just did a pin-map of the WROVER-like module on the Devboard, and I noticed, there are a lot of NC pins on it. Interestingly, I haven't found a connection between IO26 on the DevBoard and the module it self. I wonder where is it connected to.
Octal needs few pins more, yes :)
not sure are they outbreaked on final Modules / DevKitS - if they are used inside die for 'octal' psram.
outbreaked at the engineering wrover modul with outside octal flash and octal psram with SoC "Marlin_9_1B", yes.

BTW-FYI: Do you know the ESP32-s2 WROOM?
( FCC: 2AC7Z-ESP32S2WROOM )
it has usually ESP32-S2 and the Flash. But no PSRAM and no PSRAM inside die.
If you look into ( under the case ) you see an empty (comfortable) place for the PSRAM ( or an second flash like you want use ur code with the modul )
esp32-s2-wroom.jpg
esp32-s2-wroom.jpg (117.93 KiB) Viewed 21902 times
it comes also as an IPX version
esp32-s2-wroom-i.jpg
esp32-s2-wroom-i.jpg (120.75 KiB) Viewed 21890 times
From my knowledge - the outcomming ESP32-S3 WROOM is interesting -
it has few things combined - and mixed - Octal/Quad, inside/outside -
from hear - PCB antenna - wait for the public news - stay tune 8-)


edit: typos, S2 IPX edition added




Baldhead wrote: ↑
Sat Apr 24, 2021 9:17 pm
 Hi @rudi,
Have you heard of QDR(Quad Data Rate) memory ?
yes, example
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Re: ESP32-S3 (Beta2) MARLIN_9_1B on ESP32-S3-Addax-1 V1.0 Specs & Datasheet

Postby Vader_Mester » Mon Apr 26, 2021 10:13 am

rudi ;-) wrote: ↑
Sun Apr 25, 2021 11:47 pm
Vader_Mester wrote: ↑
Tue Apr 13, 2021 7:12 am
 Do you know if uFL connector versions will come from these modules as well?
the mini serie contains mini-1 (PCB Ant) and mini-1U (IPEX),
also final S3 series there will been MINI module and from hearing - WROOM module -
not hearing - WROVER module -
Vader_Mester wrote: ↑
Wed Apr 14, 2021 12:44 pm
 I just did a pin-map of the WROVER-like module on the Devboard, and I noticed, there are a lot of NC pins on it. Interestingly, I haven't found a connection between IO26 on the DevBoard and the module it self. I wonder where is it connected to.
Octal needs few pins more, yes :)
not sure are they outbreaked on final Modules / DevKitS - if they are used inside die for 'octal' psram.
outbreaked at the engineering wrover modul with outside octal flash and octal psram with SoC "Marlin_9_1B", yes.
Well, I'm glad me and my company signed an NDA with Espressif, so I can get my hands on stuff when available. Perhaps I need to wait for my WROOM samples to arrive and docs to be more and more completed :)

Code: Select all

task_t coffeeTask()
{
	while(atWork){
		if(!xStreamBufferIsEmpty(mug)){
			coffeeDrink(mug);
		} else {
			xTaskCreate(sBrew, "brew", 9000, &mug, 1, NULL);
			xSemaphoreTake(sCoffeeRdy, portMAX_DELAY);
		}
	}
	vTaskDelete(NULL);
}
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rudi ;-)
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Re: ESP32-S3 (Beta2) MARLIN_9_1B on ESP32-S3-Addax-1 V1.0 Specs & Datasheet

Postby rudi ;-) » Tue Apr 27, 2021 10:50 am

Vader_Mester wrote: ↑
Mon Apr 26, 2021 10:13 am
 Well, I'm glad me and my company signed an NDA with Espressif
:shock:
-------------------------------------
love it, change it or leave it.
-------------------------------------
問候飛出去的朋友遍全球魯迪
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Re: ESP32-S3 (Beta2) MARLIN_9_1B on ESP32-S3-Addax-1 V1.0 Specs & Datasheet

Postby Vader_Mester » Tue Apr 27, 2021 11:19 am

rudi ;-) wrote: ↑
Tue Apr 27, 2021 10:50 am
Vader_Mester wrote: ↑
Mon Apr 26, 2021 10:13 am
 Well, I'm glad me and my company signed an NDA with Espressif
:shock:
I agree. Excitement intesifies! 8-)

Code: Select all

task_t coffeeTask()
{
	while(atWork){
		if(!xStreamBufferIsEmpty(mug)){
			coffeeDrink(mug);
		} else {
			xTaskCreate(sBrew, "brew", 9000, &mug, 1, NULL);
			xSemaphoreTake(sCoffeeRdy, portMAX_DELAY);
		}
	}
	vTaskDelete(NULL);
}
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Deouss
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Re: ESP32-S3 (Beta2) MARLIN_9_1B on ESP32-S3-Addax-1 V1.0 Specs & Datasheet

Postby Deouss » Thu Apr 29, 2021 1:38 pm

I just wonder if Espressif plans some RISC-V boards with more than 1 core and 64bit since it is very cheap and super low power consuming design. Perfect for 5Ghz and HD vid stuff
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Re: ESP32-S3 (Beta2) MARLIN_9_1B on ESP32-S3-Addax-1 V1.0 Specs & Datasheet

Postby Vader_Mester » Fri Apr 30, 2021 5:59 am

Deouss wrote: ↑
Thu Apr 29, 2021 1:38 pm
 I just wonder if Espressif plans some RISC-V boards with more than 1 core and 64bit since it is very cheap and super low power consuming design. Perfect for 5Ghz and HD vid stuff
I think, 64bit will almost never come. It is a bit overkill, since the memory and storage ESP MCU-s have to address will never be more than what is possible with 32bits.
More than 1core is possible though. I think ESP32-C3 is a good platform to test RiscV capability. I think more cores could come in the next chip.
We'll see.

Code: Select all

task_t coffeeTask()
{
	while(atWork){
		if(!xStreamBufferIsEmpty(mug)){
			coffeeDrink(mug);
		} else {
			xTaskCreate(sBrew, "brew", 9000, &mug, 1, NULL);
			xSemaphoreTake(sCoffeeRdy, portMAX_DELAY);
		}
	}
	vTaskDelete(NULL);
}
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Deouss
Posts: 425
Joined: Tue Mar 20, 2018 11:36 am

Re: ESP32-S3 (Beta2) MARLIN_9_1B on ESP32-S3-Addax-1 V1.0 Specs & Datasheet

Postby Deouss » Fri Apr 30, 2021 12:49 pm

Why 64bit is overkill? It is faster from execution point of view and it can handle 2x more bits parallel in one cpu clock cycle .
I tested K210 and this monster running at 600Mhz with camera 640x480 plus LCD 480 with full face recognition takes at peak 0.7W of power for all devices and when idle it goes below 0.05W. That's two core 64bit risc-v. Risc-v has instruction compression saving ram space and can even perform 128bit operations. This is the future
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