When using PSRAM I2S acts werid

[chibill]

I am using https://github.com/bitluni/ESP32CompositeVideo on a ESP32 WRover and when I enable the PSRAM and include the cache fix using -mfix-esp32-psram-cache-issue I run into issues where the TV loses sync. I suspect this is due to what every the fix does to the cache.

Does anyone have any ideas other then just re-tuning the timing in the signal to work around the cache fix bugs?

[chibill]

Anyone have any ideas why DMA based I2S would get messed up with a system using PSRAM? (With the DMA memory in main Ram of course)

[ESP_Sprite]

Possibly some more overhead going into the I2S ISR can cause this. By the way, if you have a somewhat recent ESP32 (ECO/chip revision 3), you can disable the PSRAM workaround, that rev has a fix in hardware.

[chibill]

What does the cache fix actually do other then prevent a specific pattern of instructions from showing up?

Also the library I am using is not using the I2S ISR its just filling a buffer as quickly as it can as far as I can tell.

[chibill]

Doing so more research I found that it has to do with what the other core from the one that is managing the I2S writing is doing. For example if its doing alot of work the I2S will get messed up and now longer have the correct timing. While if the other core is in a tight look it somehow works fine. I have a feeling this has to do with if the other core is hammering the cache with accesses.