I am trying to get the I2S_MODE_SLAVE working with having an external DAC providing the MCLK.
This is working, but only with heavy fragmented noise on the Signal, it seems to result because the external provided MCLK cannot be synchronized with the ESPs internal Clock.
Does anybody has a solution or a workaround for this? I tried it with apll on and off, but this results only in a different noise ..
The audio noise does not come from an improper layout, the signals edges are really clear on the logic analyser but "noisy"/wrong content on the data line
This is my driver setup, the external clock is a 12.288MHz:
Code: Select all
define I2S_MYSTREAM_CFG() { \
.type = AUDIO_STREAM_WRITER, \
.task_prio = I2S_STREAM_TASK_PRIO, \
.task_core = 1, \
.task_stack = I2S_STREAM_TASK_STACK, \
.out_rb_size = 24*1024, \
.i2s_config = { \
.mode = I2S_MODE_SLAVE | I2S_MODE_TX, \
.sample_rate = 48000, \
.bits_per_sample = I2S_BITS_PER_SAMPLE_16BIT, \
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, \
.communication_format = I2S_COMM_FORMAT_I2S, \
.dma_buf_count = 3, \
.dma_buf_len = 300, \
.use_apll = 1, \
.intr_alloc_flags = ESP_INTR_FLAG_LEVEL2, \
}, \
.i2s_port = 0,