ESP32 instruction set or assembly (ASM) programming docs?

[sraposo]

ESP_Sprite,

there was no intention of criticize ESP32 as a product, but it seems it aims the (huge!) market of people and companies that want a platform easy to learn (as Arduino) and with lots of features. ESP32 has seemed to us to be a interesting choice to upgrade our products and we've invested some time to check if ESP would really fit our needs. Finally, we've got here and have obtained more specific direction from you

You´ve understood what we need: highest clock frequency, minimum cycles per instruction and, at least, the basic peripherals usually found on SoC. Bluetooth and/or Wifi, if possible with embedded communication stack, would be great. If Espressif has something that complies to that, please tell us. Nowadays, we use an SoC that performs instructions at 10MHz and offer less memory than we´d like and it is prevent us from escalating our products capabilities.

We´ll contact your business colleagues about Cadence documentation. Thanks!

Regards

[jens.alfke]

in my experience not having publicly-available documents seem to mostly affect those hobbyists and very few professionals.

There's a large middle ground between "professional" and "hobbyist", and a lot of important software is developed by people in that middle ground. An NDA requirement is a pretty big barrier to open source development!

The main audience, I think, of assembly programming information for ESP32 would be developers of compilers and related development tools. That's actually what got me interested in looking at the ISA: I was wondering how optimal it would be for a FORTH compiler. I'm not sure if there's an available ESP32 code generator for LLVM; if so, that helps, but not all compilers use LLVM.

[sraposo]

In any platform, there aren't too many people interested in assembly, but there are lots of other ones who will benefit with the products made by the first group, what improves the Soc attractiveness.
It´s unexpected a SoC maker doesn't provide detailed information about its product...

[Kaisha]

I know this thread is a bit old, but I'd love to see an updated ESP32 with a Risc-V core (ie. dual core or more, 512kB of ram, etc..). Right now nothing on the market comes close to the combination of price/perfomance of the ESP32.

[ESP_Sprite]

Well, we have the ESP32C3, which is RISCV, but admittedly that's a somewhat smaller SoC than the ESP32 is.

Also, on-topic, we have collected all the info that already was public (in the form of gcc patches, existing public docs etc) and have attempted to make a reference for the Xtensa arch. It might be enough to get you started if you wanted to do something in Xtensa asm.

[janlksrckts]

Hi ESP-Sprite,

I see this thread is pretty old now, but still, you wrote:

just to set expectations: don't assume you'll get an 120MHz GPIO waveform when you re-write that in assembly. On the ESP32, GPIO is routed via the APB bus and it will take the hardware multiple APB cycles to set/clear a GPIO bit.

Well, being able to toggle GPIO's in a few clock cycles is exactly what I expect from a MCU. I wrote a software SPI because the hardware SPI cannot set the CS of a DAC high each 2 bytes, which is required for a number of DACs (So far I haven't found a single DAC which does not need that). See my post "SPI cannot deliver 800 ksps to external DAC" in viewtopic.php?f=12&t=32285&sid=0250c7bc ... 712e9d278b. In softSPI I can, but even when using a clock speed of 240 MHz toggling a GPIO achieves a maximal clock speed of 10 MHz, and I need at least double of that.

We have 'fast GPIO' options in the -S2 and -C3 to get around this limit, but the ESP32 does not have that.

These versions have only a single core, which also needs to run other tasks I guess. Can these be used for bare metal programming? So turn of FreeeRTOS and watchdog?

[ESP_Sprite]

Well, being able to toggle GPIO's in a few clock cycles is exactly what I expect from a MCU.

We are aware of that, hence the addition of fast GPIO in later chips.

We have 'fast GPIO' options in the -S2 and -C3 to get around this limit, but the ESP32 does not have that.

These versions have only a single core, which also needs to run other tasks I guess. Can these be used for bare metal programming? So turn of FreeeRTOS and watchdog?

Meanwhile, we also released the ESP32-S3, which is dual-core and also has fast GPIO. Perhaps that is feasible to you?

[sraposo]

Hi.

Indeed, the ideal would be to program directly the ESP32 components, with no intermediation of a RTOS.

[ADI8421]

I gave up on the ESP32 range because of the ASM problems.
Writing a bit of code in an Arduino environment for ESP32 was even worse than the old days of peeking and poking in Basic.
It was so slow just writing to a port and then having your code interrupted every 1ms for close to 5 us each time.
I went back to an Atmel Xmega chip with a true 32 mhz clock. Or even the LGT8F328P (Chinese clone of the ATmega328P) runs at 32 mhz too.

[MicroController]

Meanwhile on the internet...
Cadence has published an "Xtensa Instruction Set Architecture (ISA) Summary", which on 700 pages documents all instructions.

And in the ESP-IDF, in components/xtensa/.../core-isa.h you can find which instruction subsets each ESP implements beyond the "core architecture".