Hello everyone,
I'm starting with this hobbies and have one question, I swear that searched before posting because couldn't find a clear answer.
The docs says that the ESP32 has 4 SPI buses, only 2 are usable by us, but I understand that each bus has up to 3 cs pins to connect slaves, but I only can find one CS pin per SPI bus, so my question is where are the other 4 CS pins that supposed to have the ESP32???
Best regards
ESP32 SPI CS
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Re: ESP32 SPI CS
All CS pins are freely assignable via the GPIO matrix and as such do not have specific pins dedicated to them. Some pins are either assumed (e.g. the flash CS pin) or have a faster path via the IO mux, so they do have pins that are more specific, but even they can be re-routed to other pins as soon as the software is running.
Re: ESP32 SPI CS
Thank yoy for the answer, I know about the software assignment, but I was asking for the phisical pins the docs refer to.
Maybe I'm wrong but when I read I think that must be 3 phisical pins attached to each SPI2 and SPI3, and also think that must be 2 SPI interfaces available to the user plus the interfaces used by the ESP32 itself (SPI0 and SPI1) besides I only could find one of them...
Maybe that pins or SPI interfaces are under the shield and not really user-avaiable...
Maybe I'm wrong but when I read
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SPI2 and SPI3 are general purpose SPI controllers, sometimes referred to as HSPI and VSPI, respectively. They are open to users. SPI2 and SPI3 have independent signal buses with the same respective names. Each bus has three CS lines to drive up to three SPI slaves.
Maybe that pins or SPI interfaces are under the shield and not really user-avaiable...
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- Joined: Mon Mar 09, 2020 7:36 pm
Re: ESP32 SPI CS
You have to remember that there are only 48 real pins on the device, and of those 15 have a single permanent purpose.
So all the other desired features have to be allocated as needed. If you are not using the internal DAC, then those are good GPIOs or CS pins. The high number (34+) GPIOs are input only, so not suitable as CS. I just went to an external SPI DAC to get a free GPIO, other pin became chip select for the new DAC. Breaking some of the Internal Flash pins free would be nice, maybe an example of how to do that will be released someday.
So all the other desired features have to be allocated as needed. If you are not using the internal DAC, then those are good GPIOs or CS pins. The high number (34+) GPIOs are input only, so not suitable as CS. I just went to an external SPI DAC to get a free GPIO, other pin became chip select for the new DAC. Breaking some of the Internal Flash pins free would be nice, maybe an example of how to do that will be released someday.
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