Direct manipulation of GRIO's 32-39 for ESP32

[insanoff]

Hi Folks,

I could not find anywhere how to define GRIO's 32-39 using macros. This is how I thought it could be done:

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REG_WRITE(GPIO_IN1_REG, BIT34);

But apparently it is not the case. In gpio.h file it is defined as:

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#define GPIO_SEL_34             ((uint64_t)(((uint64_t)1)<<34))

Definitely I did not understand the idea behind the ESP32 GPIO definition. I would like to know how to define GPIO34 as an input enabling the internal pull down.

Thanks!
Adam

[ESP_igrr]

Hi insanoff,

The bits of GPIO_IN_REG map to GPIOs 0-31, and the bits of GPIO_IN1_REG map to GPIOs 32 and up. So to access GPIO32, you need to read bit 0 of GPIO_IN1_REG. Same applies to other GPIO-related registers (output, output enable, etc).

GPIO_SEL_34 macro in gpio.h is useful mainly for the pin_bit_mask member of gpio_config_t structure — it is a 64 bit bit mask which can be used for all GPIOs. If you are not using the GPIO driver and controlling GPIOs directly instead, you don't need to use GPIO_SEL_xx macros.

[insanoff]

Hi insanoff,

The bits of GPIO_IN_REG map to GPIOs 0-31, and the bits of GPIO_IN1_REG map to GPIOs 32 and up. So to access GPIO32, you need to read bit 0 of GPIO_IN1_REG. Same applies to other GPIO-related registers (output, output enable, etc).

GPIO_SEL_34 macro in gpio.h is useful mainly for the pin_bit_mask member of gpio_config_t structure — it is a 64 bit bit mask which can be used for all GPIOs. If you are not using the GPIO driver and controlling GPIOs directly instead, you don't need to use GPIO_SEL_xx macros.

Hi ESP_igrr, thank you for the reply.

I am a bit confused. What is the difference between "gpio_set_level(GPIO_NUM_5, 1);" and "REG_WRITE(GPIO_OUT_W1TS_REG, BIT5)"? In general, why we have these options and where I can learn about I/O manipulations?

[ESP_igrr]

Not much practical difference between these two, with these specific arguments. The call to gpio_set_level is safer because it can check that the pin number is not out of bounds. It will also keep working on future chips, which may have different GPIO register names. On the other hand, direct register access will be slightly faster.