ESP32 Webradio

[Jakobsen]

Hi WiFive

Thanks for the hint - No no sign of an APLL enabled by that call. Parameter change did do something but not any thing deterministic - and still a lot of jitter on BCK

/j

[rudi ;-)]

Hi WiFive

Thanks for the hint - No no sign of an APLL enabled by that call. Parameter change did do something but not any thing deterministic - and still a lot of jitter on BCK

/j

perhabs you must change the register too:

clk_reg_1.jpg (73.02 KiB) Viewed 19973 times

clk_reg_2.jpg (89.37 KiB) Viewed 19973 times

clk_reg_3.jpg (41.48 KiB) Viewed 19973 times

cut from lib

rtc_clk.o rtc_xtal_32k_ena
rtc_clk.o rtc_8m_ena
rtc_clk.o rtc_plla_ena
rtc_clk.o rtc_set_slow_freq
rtc_clk.o rtc_set_fast_freq
rtc_clk.o rtc_bbpll_md
rtc_clk.o rtc_init_xtal_freq
rtc_clk.o rtc_get_xtal
rtc_clk.o rtc_apb_freq_up
rtc_clk.o rtc_uart_div_modify
rtc_clk.o rtc_uart_tx_wait_idle
rtc_clk.o rtc_set_cpu_freq
rtc_clk.o rtc_init_clk
rtc_clk.o rtc_init_clk_lite

perhabs it helps you

[rudi ;-)]

my setup test was from 2.5 MHz do 154 MHz
each higher pos was more clear as the preview

example 2.5 MHz ( Jitter )

Code: Select all

rtc_plla_ena(1, 0, 255, 0, 0); // 2.5MHz

2.50MHz.jpg (108.62 KiB) Viewed 19972 times

info for the choice of src of clock and register are in the technical docu too

clk_reg_a.jpg (83.85 KiB) Viewed 19972 times

hope this helps.

[WiFive]

Maybe https://github.com/espressif/esp-idf/bl ... i2s.c#L161

[rudi ;-)]

yeap, WiFive is right.

316 kHz

316kHz.jpg (104.44 KiB) Viewed 19969 times

you must play with the clk register itself too
and we must use the right src
there are many parameters possible, better we wait for the docu
we can stretch time too ( ? ! )
we can polarisation too ( ? ! )
we can invert too ( ? ! )
we can do more ( ? ! )

i think "my" setup was the best for 10MHz ..160 MHz
if we want smaller we need a fine tuning with other src by choice the right register.

best wishes
rudi

[rudi ;-)]

played with the stretching and polarisation
same 316KHz
but :

5_10

316kHz_5_10.jpg (104.88 KiB) Viewed 19969 times

6_10

316kHz_6_10.jpg (109.21 KiB) Viewed 19968 times

8_10

316kHz_8_10.jpg (109.86 KiB) Viewed 19966 times

with more playtime the jitter can be compensated
and there are differences with
-> DevKitC V1
-> DevKitC V2
-> DemoBoard V2
-> Wrover V1
-> Wrover V2
-> ...

i mean, the jitter make sig time delayed waved, perhabs a caps to much in the line?
.. i do not know .. i am

hardware hobbiest

[rudi ;-)]

O yes - need more coffee - i did commit - as I use to on SVN but i see there is more to it then that.
I will try to follow you description tonight and have added git to my bucket list.

Any progress?

Its going to be on Github as soon as I got it to work.

Any progress
Where are you stuck

best wishes
rudi

[BuddyCasino]

Any progress
Where are you stuck

I'm sending a multipart http message (json + pcm audio) to the Alexa endpoint, but they reset the connection and I have no idea why. When I interrupt my data sending by returning NGHTTP2_ERR_DEFERRED from my data_source_read_callback() to give nghttp2 time to read from the socket to maybe retrieve some error message that would help me, I only get a settings frame and after that its "mbedtls_ssl_write returned -0x50", which means the peer reset the connection.

It works in my Java prototype. Its totally infuriating.

[Jakobsen]

Hi Rudi

I did change the plla_ena in the i2s code as well. It is the jitter that we need to reduce. For audio codec and i2s interface with out faster MCKL in the setup, the jitter on BCK crank up the noise floor in the audio band.

We need more insight to the esp32 clock system to get the apll going - the audio quality is good for now - just no CD quality yet.

Do not down play you hobby approach to this stuff - you got you hand more dirty then most professional has the skills to do.

I am stocked by work and lag of focus - I am working some dsp stuff that also will be needed to do a top notch platform.

Code: Select all

    return ESP_FAIL;
    }
    clkmInteger = clkmdiv;
    clkmDecimals = (clkmdiv - clkmInteger) / denom;
    float mclk = clkmInteger + denom * clkmDecimals;
    bck = factor/(bits * channel);

   // rtc_plla_ena(1, 0, 0,1 , 0);
	I2S[i2s_num]->clkm_conf.clka_en = 1; // jkj was 0
    I2S[i2s_num]->clkm_conf.clkm_div_a = 63;
    I2S[i2s_num]->clkm_conf.clkm_div_b = clkmDecimals;

/j

[rudi ;-)]

@Jakobsen

thank you for the friendly words.

have you seen, we have now I2S Theme in ESP32 technical Reference
Update is from today, 2017 March 1
V 1.5

techRefMarch2017_a.jpg (56.14 KiB) Viewed 19311 times

here you get it
visit allways the espressif resource for newer updates

techRefMarch2017_b.jpg (102.95 KiB) Viewed 19311 times

best wishes
rudi

ps: i am on the road - will come back to your post asap