Pins swapped on flash? Incorrect flash chip?

[cnlohr]

I've finally gotten around to trying to work on my ESP32+Ethernet board and tried programming it to no avail.

Code: Select all

Connecting...
Uploading stub...
Running stub...
Stub running...
Attaching SPI flash...
Configuring flash size...

And it gets stuck on Configuring flash size...

I assumed it has to do with my pin-mapping to the flash. I use a W25Q chip, i.e. W25Q128. I mapped my pins to that package and these don't seem to match up to the ones on some of the data sheets floating around. IO0/1 and IO2/3 are swapped.

I tried swapping them on my board to no avail. Can you confirm that the W25Q series is compatible and that this is correct?

[WiFive]

Yes, check hardware design guidelines
http://espressif.com/en/support/download/overview

You should be matching spi pins not SD or hs1 pins even though it is dual/quad spi. Confusing and not well documented until now.

[cnlohr]

Hmm? My complaint is that the official schematic does not match the pinout of the W25Q... I am not sure if this is because I have the wrong flash chip?

[ESP_Sprite]

Huh? In what sense does it not match? Because at least the pin numbers and flash signals seem to line up perfectly, unless I'm overlooking something.

[WiFive]

Huh? In what sense does it not match? Because at least the pin numbers and flash signals seem to line up perfectly, unless I'm overlooking something.

The confusion is that one is focused on "I'm going to use quad i/o mode" and if you look at flash io0-io3 they do not connect to SD_data0-SD_data3. So it's just a potential whoops if you are not paying attention. Mostly this is due to a lack of detail in documentation of sdio and spi, what they do, how they are related (not). And the labels on the schematic.

[cnlohr]

There is contradictory labeling on the W25Q... I'm just not sure what way it's "supposed" to be. Are the pins labeled incorrectly but wired right in the official schematic?

[WiFive]

There is contradictory labeling on the W25Q... I'm just not sure what way it's "supposed" to be. Are the pins labeled incorrectly but wired right in the official schematic?

Not seeing it. Are you talking about the fact that they are drawn out of order but still numbered correctly, or can you be more specific?

[ESP_Angus]

I think what cnlohr means is that on the flash datasheet, DO is marked "IO1" whereas on the ESP32 pinout, DO is known as "SD_DATA_0"/"SD0". Similarly, on the flash chip DI is marked "IO0" whereas on the ESP32 pinout DI is known as "SD_DATA_1"/"SD1". cnlohr has matched the numbers on the flash datasheet to the numbers used on the ESP32 pin names, meaning DI and DO are swapped.

I don't know how much of the IO numbering here is a convention that may vary between different chip vendors.

[rudi ;-)]

I've finally gotten around to trying to work on my ESP32+Ethernet board and tried programming it to no avail.

hi charles
which eth phy chip you use?
have you try to generate the clk over gpio16?
any success?

best wishes
rudi

edit:
ah, think found it

cnlohr_eth_board_40x.jpg (77.85 KiB) Viewed 17018 times

datasheet
KSZ8081RNAZA

have you tested it ? - , RMII work's
btw:
from where you take the src 50MHz clk?
extra Osz or GPIO16 or other?

thanks!

best wishes
rudi