GPIO access by both the SOC and ULP

[wevets]

I need to be able to read and write the same GPIOs from both the ULP and the SOC.
I can read/write the the GPIOs (25 and 26, which map to RTC_GPIOs 6 and 7) from the ULP alone just fine if I comment out reads/writes from the SOC. When I enable SOC reads/writes, the the ULP reads/writes don't work.

I configure the GPIOs for the SOC before first access and when I awake from the ULP with gpio_config().
Then I configure the RTC_GPIOs before putting the SOC to sleep and starting the ULP by calling gpio_reset_pin(), then rtc_gpio_init(), then rtc_gpio_set_direction(). This all works fine when I comment out SOC access, but ULP access doesn't work if the SOC is allowed to access the GPIOs.
gpio_reset_pin() seems to be the only API I can find that would clear the decks for initializing for RTC GPIO access by the ULP.
What am I missing? Is there some port I can wiggle that will "undo" fully what gpio_config() does, or another handy API that does what I would think gpio_reset_pin() should do?

Thanks.

[WiFive]

Did you try leaving them in rtc gpio mode and using the rtc gpio apis from main cpu?

[wevets]

WeFive,

Sorry it took so long to get back on this. Your suggestion, (which had not even occurred to me based on my reading of the docs) works. Thank you very much.

wevets