Ultra low-power ULP

[wevets]

I'm working on an application in which I need to squeeze out the most battery life I can. I'm already running the SOC clock at 40 MHz as selected in "make menuconfig" when I have to have the SOC running, but expect to be on the ULP either actively or sleeping most of the time.

In reading the ESP32 tech reference, it appears that the default ULP clock in deep sleep mode is 150 kHz, giving a clock period of about 6.6 µS. (the clock period is important to me as I want to use it in figuring RTC_GPIO drive and read times for an external device based on clocks per instruction, which seems reasonable given the very good data on that topic.)

There are several things in the tech reference that don't quite give me what I want to know.
1. I want the lowest possible ULP clock frequency as well as what that frequency is.
2. The default is apparently a 150 kHz internal RC clock which is said to be "adjustable" in several places, but I can't find info on how to adjust it or how far it can be adjusted. There doesn't seem to be anything in make menuconfig to help either. There is something on page 657 about the 8-bit RTC_CNTL_SCK_DCAP field in the RTC_CNTL_VREG_REG register being used to adjust the RTC slow clock, but it's not clear that this is used to clock the ULP.
3. Diagram 166 on page 634 of the tech reference seems to be saying that the ULP clock is derived from "CKM8M_OUT (the 8 MHz clock) div n" (n seems to be 256, which would give a 31 kHz clock...better), but on page 636 under "Deep-sleep mode" it says the 8 MHz clock is disabled during SOC deep sleep. If the 8 MHz clock is disabled, that's not an option for the ULP clock if diagram 166 tells the whole tale.

It's all a bit confusing. My simple question is: How do I drive the ULP at the lowest possible clock frequency and what is that frequency?
Can you help? Is there any clear documentation on this topic?

Thanks.

[wevets]

Also, forgot to ask in the last question: I've read that the ESP32-S2 will have some enhancements to the ULP instruction set. Is there any information on that yet?

Again, thanks.

[WiFive]

Also, forgot to ask in the last question: I've read that the ESP32-S2 will have some enhancements to the ULP instruction set. Is there any information on that yet?

Again, thanks.

Yes, it's entirely different risc-v isa

[WiFive]

ULP runs on RTC_FAST_CLK which is 8mhz. RTC timer runs on RTC_SLOW_CLK which is either 150khz or 8Mdiv256 or 32khz crystal. The way to conserve power is to have the ULP sleep/wake periodically.