ESP32-WROOM-32D and ESP-PROG

[PaulVdBergh]

Hello All,

I'm developing a KiCad schematic and PCB layout that will be used as starting point for different modules. I'll use the ESP32-VROOM-32D module as processor and use an ESP_PROG device to programm/debug the software in the processor.

Does one of the connections (EN, IO0, etc) need a pull-up or anything so that the ESP32 will boot in normal mode when the ESP-PROG isn't connected? And how strong must be these pull-ups ?

Thanks in advance,

Paul

P.S. How can I include screendumps in a topic ? An image tells more than words ...

[Panometric]

Paul,
Wish I could offer good advice, but you may notice allot of the recent posts on this forum, including mine are on the same subject. So this reply is just to say, be wary, this is not a simple subject as it should be.

Here is what I understand to be true. I hope someone will correct of I am wrong.
1. EN (also called CHIP_PU) does need to pulled up and filtered with a cap, values vary, see below.
2. Some examples I have seen also show IO0 also being pulled up with 5K. But this pin is normally pulled up weakly anyway.
3. The rest of the Strapping pins can be left open.
4. The two pins above should both have switches for manual downloading.
5. There is a special circuit on the eval boards using 2 NPNs that implements logic for DTR and RTS. These are both outputs, so many serial adapters do not support them both. But the module needs them to trigger automatic downloading. If you plan to use a platform like Zerynth, you have to implement the serial with automatic downloading, JTAG is not an option they support.

According to the data sheet, all the"Strapping Pins" need 1mS stability after EN is high. Then they become can other things. But my own experience says it's more complicated than this. My Rover module is getting these but will not auto program. It manually programs fine.

The official details are here:
See Section 2.3, 2.4
https://www.espressif.com/sites/default ... eet_en.pdf
Section 2.3 Here:
https://www.espressif.com/sites/default ... eet_en.pdf

Regarding the values, notice there has been evolution on this. The example board revisions show different setups. For example, DevkitcV2 has 12K PU on 1nF, DevkitC V4 has 10k into 100nF.

Good luck.

[PaulVdBergh]

Hi Panometric,

Thanks for your explanations.

According to the schematics from the ESP-PROG device, there are pull-ups and caps to ground on both the EN and IO0 lines, but they are marked (NC), so they are AFAIK not mounted. Both the EN and IO0 pins are pulled up by a 10k resistor and a 1nF cap to ground. I think I must provide these circuits on my own board. I've attached my schematic, Is this correct or do I need corrections?

Basic configuration.jpg (733.85 KiB) Viewed 14900 times

Thanks,

Paul

[Panometric]

This looks good to me Paul. FYI, I found my issue, RTS and DTR are active low which is only clear on some schematics.

[te-bachi]

Hi Paul,

Thanks a lot for sharing your schematics. I want to use ESP-PROG with a custom user board using ESP32-WROOM-32D in the same way as you do.

Did you already produce a module/PCB and tested it? Programming and debugging works as expected?

Just one question: why you don't power the ESP32-WROOM-32D directly over ESP-PROG (JTAG pin 1, PROG pin 2) but use an external power source?

About the "Automatic Downloading Function" described in Introduction to the ESP-Prog Board:
The schematics are in ESP-PROG itself? I don't have do design the components on the custom user board? I checked the esp-prog schematics, and they are included... I just want to double check

Regards,

Andreas

[joeservo]

Panometric, can you explain:

My Rover module is getting these but will not auto program. It manually programs fine.

what is auto program and what is manual?

did you see varying results when investigating the resistor/cap combo on the EN pin? i've tried all of the combinations with no luck. they all spit out the "waiting for download" message. no cap, 0.1uF, 4.7uF, 10uF.

my suspicion is the timing/baud rate is not exact. sometimes i see a missing character on my serial console. for instance DOWNLAD instead of DOWNLOAD.

this problem seems to be the number one issue people are having. i wish ESP would address it better.

Thanks

[Panometric]

@joeservo Sorry I did not see this.

By manual I meant pressing the button to pull GPIO0 low, rather then letting the RTS/DTR do it.

I found that the 100nF cap I had on GPIO causes problems, my board only works to automatically program with no cap.

[michalk]

Is the schematic posted above the proper way to interface (JTAG, program) to the ESP32 module? I'm finding variations of schematics, and can't find a reference design on Espressif's site.

[johntaves]

Does the schematic above work properly?

Why are there 2 connectors, j2 JTAG and j3 Programming? Does the esp-prog use the jtag for debugging and the other for programming?

jt