For the SPI bus in pico, it usually takes long time in CS high between commands.
Even in high clock, the CS high still dominate lots of time against CS low.
Is it possible to adjust the time for keeping CS high less than 1 us between commands?
CS control in SPI
CS control in SPI
- Attachments
-
- SPI with 20M clk
- Screenshot from 2019-06-24 13-34-21.png (223.02 KiB) Viewed 1964 times
Who is online
Users browsing this forum: No registered users and 101 guests