DPORT access workaround and high interrupts.

[Malishev]

Hi!
Is it safe to access peripheral registers from high interrupt handler? I ask, cause this interrupts is not disabled via freertos macro, so esp-idf dport access workaround do not work in this case.

[Malishev]

Actually interrupt handler for interrupt with level > 4 will break both workarounds. APB register preread workaround do not work, cause it only disable level 3 or lower ints. Stalling other cpu workaround also do not actually stall cpu if 4 lev int arrive.
So far I got no other responses, so I would conclude that high ints in esp32 are not usable due to silicon bug.

[ESP_Angus]

Hi Malishev,

Thanks for reporting this and being patient while someone got back to you. You're correct that using a high level interrupt will currently break the DPORT access workaround.

The fix seems like it should be as simple as having the workaround disable higher priority interrupts as well. We're going to verify that's the case and release a fix. Will reply here when we have more to tell you.

[Malishev]

Hi! Thank you for looking into this.

Disable all not-nmi intrrupts in the workaround looks resonable. I hope the fix will not disable high interrupts in portENTER_CRITICAL, cause this will make high ints much less usefull.

I wounder if dport access is used at all in the post initialization stage. It is used in hw crypto, but this could be easily disabled. Do the wifi binary use dport registers?

[Konstantin]

Hi Malishev.

Thank you for your report about it. We have fixed this recently - https://github.com/espressif/esp-idf/co ... 3dbc2d066b.
This fix disables interrupts up to 5 levels for two DPORT workarounds. (will merge it as well to 3.3, 3.2 and 3.1).

[Malishev]

Thank you! It is very flexible and nice solution.