Hi all.
ESP guys please shed the light or draw a line under 5v tolerance discussion.
In my projects I often need to interface with old 5v TTL logic devices.
Can ESP32 accept 5v TTL level signal on GPIO inputs or it will fry the input pin if not the whole module?
ESP-WROOM-32 datasheet clearly states that maximum input for high logic level is VDD+0.3 where max VDD is 3.6V so max level is 3.9V.
While ESP32 datasheet in absolute maximum section defines max high level input voltage as 3.3V but at the same time in recommended section it defines VIH as Vio where max Vio is 3.6V. It is a bit confusing.
I wonder if there are any over-voltage protection inside ESP32 chip which can make possible to feed GPIO input pins with up to 5V levels without any level shifting?
Thanks in advance.
5V tolerance
Re: 5V tolerance
I think the 3.9V recommended max may be a mistake in the ESP-WROOM32 datasheet, the ESP32 datasheet suggests you can't go this high. I'll check up on this.
For "slow" 5V signals, it should be possible (though hacky) to use a single high value series resistor (1K or, ideally, more) to limit the current into the I/O pin's input protection circuitry, preventing it from damage. This is probably OK for a quick hack, but I would not recommend it for production hardware design or something where you need maximum reliability over the long term.
In those cases, level shifting is the best approach.
For "slow" 5V signals, it should be possible (though hacky) to use a single high value series resistor (1K or, ideally, more) to limit the current into the I/O pin's input protection circuitry, preventing it from damage. This is probably OK for a quick hack, but I would not recommend it for production hardware design or something where you need maximum reliability over the long term.
In those cases, level shifting is the best approach.
Re: 5V tolerance
I've been doing some tests on this lately, and have come up with the following (non-official) conclusions.
Basically, I'm testing with a 1K resistor from 6.4v to an ESP-WROOM-32 on a Devkit module that is powered via USB and running with all I/Os at default states.
Only some of the I/O pins appear to have a "strapping" protection on them (generally pulling the resistor down). The others may barely start to pull a few uA at 6.5vDC.
GPIO 0 - 4.6v
GPIO 1 - 3.4v (driven, TX0)
GPIO 2 - 4.2v (has blue LED on Devkit module)
GPIO 3 - 4.9v
GPIO 4 - 4.6v
GPIO 5 - 6.1v
GPIO 6-11 (reserved for FLASH chip)
GPIO 12 - 4.6v
GPIO 13 - 4.6v
GPIO 14 - 4.6v
GPIO 15 - 4.6v
GPIO 16 - 6.4v (!)
GPIO 17 - 6.4v
GPIO 18 - 6.4v
GPIO 19 - 6.4v
<GPIO 20>
GPIO 21 - 6.4v
GPIO 22 - 6.4v
GPIO 23 - 6.4v
<GPIO 24>
GPIO 25 - 3.9v
GPIO 26 - 3.9v
GPIO 27 - 4.6v
GPIO 32, 33, 34, 35, 36, 39 - 4.6v
At first, I thought there was something between GPIOs and the power domain (VDD3P3_RTC / VDD_SDIO / VDD3P3_CPU), but after testing all of the available I/O pins, it now seems somewhat unclear.
The ESP32 module still boots and handles serial just fine; I haven't tested whether the I/Os have suffered any damage from this test. But it appears somewhat clear that blocking diodes are not present on most of the I/Os provided by the ESP32. This indicates that running long lines to sensors (even with safe level signals) may not have as much protection as desired from spurious electrical incidents.
EDIT: Tested negative pulldown by applying -5v through a 1K resistor to the I/O pins. All pins that weren't driven (i.e. everything except GPIO 1), came in at -0.6v. Therefore, there at least appears to be a blocking diode on the negative side of each I/O pin, just not the positive side.
EDIT 2: My assumption was that if an I/O lead was rated to source or sink 20mA (or 40mA, depending!) that I could safely pull up to 20mA of current through it with overvoltage--as long as the current was limited, that I'd be fine. The above measurements seem to say otherwise, as I assume that an output lead would resist being pulled much past VDD (note GPIO 1 @ 3.4v above!) up to the 20mA spec...however, if I set the same pin to an input, it appears not to give a smidge of resistance to being driven past 6.5vDC.
Could we PLEASE get some official spec from Espressif engineers as to the output I/O circuits on the ESP32? For comparison, Microchip PIC datasheets all have I/O pin schematics indicating the presence (or lack thereof) of blocking diodes, drivers, sensor limitations, etc. on the chip, which is very handy for product engineering.
Basically, I'm testing with a 1K resistor from 6.4v to an ESP-WROOM-32 on a Devkit module that is powered via USB and running with all I/Os at default states.
Only some of the I/O pins appear to have a "strapping" protection on them (generally pulling the resistor down). The others may barely start to pull a few uA at 6.5vDC.
GPIO 0 - 4.6v
GPIO 1 - 3.4v (driven, TX0)
GPIO 2 - 4.2v (has blue LED on Devkit module)
GPIO 3 - 4.9v
GPIO 4 - 4.6v
GPIO 5 - 6.1v
GPIO 6-11 (reserved for FLASH chip)
GPIO 12 - 4.6v
GPIO 13 - 4.6v
GPIO 14 - 4.6v
GPIO 15 - 4.6v
GPIO 16 - 6.4v (!)
GPIO 17 - 6.4v
GPIO 18 - 6.4v
GPIO 19 - 6.4v
<GPIO 20>
GPIO 21 - 6.4v
GPIO 22 - 6.4v
GPIO 23 - 6.4v
<GPIO 24>
GPIO 25 - 3.9v
GPIO 26 - 3.9v
GPIO 27 - 4.6v
GPIO 32, 33, 34, 35, 36, 39 - 4.6v
At first, I thought there was something between GPIOs and the power domain (VDD3P3_RTC / VDD_SDIO / VDD3P3_CPU), but after testing all of the available I/O pins, it now seems somewhat unclear.
The ESP32 module still boots and handles serial just fine; I haven't tested whether the I/Os have suffered any damage from this test. But it appears somewhat clear that blocking diodes are not present on most of the I/Os provided by the ESP32. This indicates that running long lines to sensors (even with safe level signals) may not have as much protection as desired from spurious electrical incidents.
EDIT: Tested negative pulldown by applying -5v through a 1K resistor to the I/O pins. All pins that weren't driven (i.e. everything except GPIO 1), came in at -0.6v. Therefore, there at least appears to be a blocking diode on the negative side of each I/O pin, just not the positive side.
EDIT 2: My assumption was that if an I/O lead was rated to source or sink 20mA (or 40mA, depending!) that I could safely pull up to 20mA of current through it with overvoltage--as long as the current was limited, that I'd be fine. The above measurements seem to say otherwise, as I assume that an output lead would resist being pulled much past VDD (note GPIO 1 @ 3.4v above!) up to the 20mA spec...however, if I set the same pin to an input, it appears not to give a smidge of resistance to being driven past 6.5vDC.
Could we PLEASE get some official spec from Espressif engineers as to the output I/O circuits on the ESP32? For comparison, Microchip PIC datasheets all have I/O pin schematics indicating the presence (or lack thereof) of blocking diodes, drivers, sensor limitations, etc. on the chip, which is very handy for product engineering.
Re: 5V tolerance
I wouldn't put any faith in those results.
ESD protection diodes are designed to bleed away small currents that static electricity produces (high voltages but small currents). As such, they are not designed to handle much current. It is possible that you've already destroyed some of your ESD protection in your testing.
A 1 Kohm resistor at 5V means that you've put 1.1 mA through the pin in current. If the ESD diode was absorbing all of that, then it probably vanished in a silent poof.
There are proper ways to interface with 5V devices with chips and level translating transistors. It's best that you spend some time learning about them.
ESD protection diodes are designed to bleed away small currents that static electricity produces (high voltages but small currents). As such, they are not designed to handle much current. It is possible that you've already destroyed some of your ESD protection in your testing.
A 1 Kohm resistor at 5V means that you've put 1.1 mA through the pin in current. If the ESD diode was absorbing all of that, then it probably vanished in a silent poof.
There are proper ways to interface with 5V devices with chips and level translating transistors. It's best that you spend some time learning about them.
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Re: 5V tolerance
Agreed. If you want our official stance, it's that we do not support 5V inputs period, please keep to the values pointed out in the datasheet, don't go guessing to the internal structure as the main problem wrt 5V-compatibility is things that are very hard to put in a schematic (iirc degradation due to quantum tunneling, for instance).
We're happy to help you wrt unofficially getting something to work, but do know that anything in that direction is out of spec and we cannot guarantee the long-term stability of a solution like that.
We're happy to help you wrt unofficially getting something to work, but do know that anything in that direction is out of spec and we cannot guarantee the long-term stability of a solution like that.
Re: 5V tolerance
Going forward, do you guys think you'll officially support 5v tolerance? It would be a nice feature to have and make interfacing much easier in many cases.
Re: 5V tolerance
There is like a bazillion of devices out there that do this for super low cost. Ever since the first micros that went from 5v to 3.3v this issue has been around. Asking to add 5v compatibility to a modern micro is just going to raise the cost of it.Going forward, do you guys think you'll officially support 5v tolerance? It would be a nice feature to have and make interfacing much easier in many cases.
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- Posts: 9723
- Joined: Thu Nov 26, 2015 4:08 am
Re: 5V tolerance
Plus, if I understand correctly, it's a process issue... modern processes like the ESP32 uses aren't built to support 5V in any way, shape or form; the foundry just doesn't specify how the dies behave when you apply that much voltage to it, which also explains our ambivalent 'we don't support it but whack a series resistor at it and she'll be probably fine' messages here. It may be possible to get into some sort of mixed process, perhaps, but my guess is that there is a quite large cost and complexity penalty to doing that. As our main customers all have phased out 5V logic a long time ago, this is not something we're planning on doing.
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