WRITE_PERI_REG vs REG_WRITE

[michprev]

Hi,
looking into this file https://github.com/espressif/esp-idf/bl ... /soc/soc.h it seems that REG_* and PERI_REG_* do the same because ETS_UNCACHED_ADDR and ETS_CACHED_ADDR does nothing. What is the idea behind it?

[abulafi]

I had the same thought but couldn't find any answer.
I hope someone will shade light on this question.

[ESP_Sprite]

Not sure, I think PERI_REG is legacy and REG is newer, but you can use them interchangeably. The difference in uncached vs cached region probably comes from 'generic' Xtensa code; while the ESP32 has cache for the SPI flash and RAM, it sits outside the Xtensa cores and does not have a matching uncached region.