[solved] PICO chip getting stuck at bootloader

[hassan789]

From time to time, my PICO chip resets due to a watchdog, and freezes forever. Anyone have any insight into this?
I am using a custom hardware with the release v3.0 code.

Logs here:

rst:0x5 (DEEPSLEEP_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 188777542, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0018,len:4
load:0x3fff001c,len:4620
load:0x40078000,len:0
load:0x40078000,len:13204
entry 0x40078ddc
I (350) cpu_start: Pro cpu up.
I (350) cpu_start: Starting app cpu, entry point is 0x40081164
0x40081164: call_start_cpu1 at C:/msys32/home/esp-idf/components/esp32/cpu_start.c:215

I (0) cpu_start: App cpu up.
I (353) heap_init: Initializing. RAM available for dynamic allocation:
I (360) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (366) heap_init: At 3FFBEC98 len 00021368 (132 KiB): DRAM
I (372) heap_init: At 3FFE0440 len 00003BC0 (14 KiB): D/IRAM
I (378) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (385) heap_init: At 4008E55C len 00011AA4 (70 KiB): IRAM
I (391) cpu_start: Pro cpu start user code
I (73) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.
I (142) I2S: DMA Malloc info, datalen=blocksize=512, dma_buf_count=32
I (142) I2S: DMA Malloc info, datalen=blocksize=512, dma_buf_count=32
I (152) I2S: PLL_D2: Req RATE: 8000, real rate: 8012.000, BITS: 32, CLKM: 78, BCK: 4, MCLK: 2048000.000, SCLK: 512768.000000, diva: 64, divb: 8
I (162) uart: queue free spaces: 500
I (172) gpio: GPIO[0]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0
(172) Enabled BUTTON wakeup on pins GPIO38

(182) Enabled SLAP wakeup on pins GPIO34

I (182) gpio: GPIO[32]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0
I (192) wifi: wifi firmware version: bffcf7f
I (202) wifi: config NVS flash: enabled
I (202) wifi: config nano formating: disabled
I (202) system_api: Base MAC address is not set, read default base MAC address from BLK0 of EFUSE
I (212) system_api: Base MAC address is not set, read default base MAC address from BLK0 of EFUSE
I (232) wifi: Init dynamic tx buffer num: 32
I (232) wifi: Init data frame dynamic rx buffer num: 32
I (232) wifi: Init management frame dynamic rx buffer num: 32
I (242) wifi: wifi driver task: 3ffc00e0, prio:23, stack:4096
I (242) wifi: Init static rx buffer num: 10
I (242) wifi: Init dynamic rx buffer num: 32
I (252) wifi: wifi power manager task: 0x3ffc0a04 prio: 21 stack: 2560
ets Jun 8 2016 00:22:57

rst:0x8 (TG1WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 188777542, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0018,len:4
load:0x3fff001c,len:4620
load:0x40078000,len:0
load:0x40078000,len:13204
entry 0x40078ddc
W (29) boot-start: PRO CPU has been reset by WDT.
W (29) boot-start: WDT reset info: PRO CPU PC=0x400050c4
W (31) boot-start: WDT reset info: APP CPU PC=0x400d1cd6 (waiti mode)
0x400d1cd6: esp_register_freertos_tick_hook_for_cpu at C:/msys32/home/esp-idf/components/esp32/freertos_hooks.c:93

[hassan789]

solved. It was an issue with the chip-enable pin voltage falling down due to faulty functionality of a voltage supervisor