Hi,
someone knowledgeable out there who can post something equivalent to the AVR's memory mapped IO for GPIO pins?
https://www.arduino.cc/en/Reference/PortManipulation
I am interested in reading and writing multiple GPIO pins in parallel without having to loop through digitalRead/Write for performance reasons.
TIA,
AP
Memory mapped IO for GPIO access
Re: Memory mapped IO for GPIO access
Free book on ESP32 available here: https://leanpub.com/kolban-ESP32
Re: Memory mapped IO for GPIO access
thanks! That clarifies a few things indeed. Please allow me a couple of follow-up questions:
* it seems that there are two registers for setting a GPIO pin to 1 (W1TS) and setting a GPIO pin to 0 (W1TC). If I want to write an 8-bit value (using 8 GPIO pins), it is not possible to do this atomically? One has to use two operations (one that sets the 1-bits and a second that sets the 0-bits)?
* I want to use the ESP32 to read and write to an 8-bit I/O bus. It seems there is no efficient way to reconfigure those 8-bits to either mode input or mode output. If performance is an issue, would it be the preferred way to use 8 pins for reading and some other 8 pins for writing? Uses more pins but at least one does not have to reconfigure the pins when switching to reading and writing.
* last one: where can I find the implementation of gpio_config()?
TIA,
AP
* it seems that there are two registers for setting a GPIO pin to 1 (W1TS) and setting a GPIO pin to 0 (W1TC). If I want to write an 8-bit value (using 8 GPIO pins), it is not possible to do this atomically? One has to use two operations (one that sets the 1-bits and a second that sets the 0-bits)?
* I want to use the ESP32 to read and write to an 8-bit I/O bus. It seems there is no efficient way to reconfigure those 8-bits to either mode input or mode output. If performance is an issue, would it be the preferred way to use 8 pins for reading and some other 8 pins for writing? Uses more pins but at least one does not have to reconfigure the pins when switching to reading and writing.
* last one: where can I find the implementation of gpio_config()?
TIA,
AP
Re: Memory mapped IO for GPIO access
perhaps a more important question: is there any documentation on GPIO_MODE_INPUT_OUTPUT_OD and GPIO_MODE_INPUT_OUTPUT?
Thx,
AP
Thx,
AP
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Vader_Mester
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Re: Memory mapped IO for GPIO access
I have the feelin you want to send and receive an 8bit wide parallel datastream.
If this is the case then you can use the I2S periferial in LCD mode.
There is an I2S parallel driver somewhere, that can be used for that. As far as I know the theoretical max clock here is 40MHz for the sending, which is prett fast and provides clock from hardware. NO need to do bit banging.
If this is the case then you can use the I2S periferial in LCD mode.
There is an I2S parallel driver somewhere, that can be used for that. As far as I know the theoretical max clock here is 40MHz for the sending, which is prett fast and provides clock from hardware. NO need to do bit banging.
Code: Select all
task_t coffeeTask()
{
while(atWork){
if(!xStreamBufferIsEmpty(mug)){
coffeeDrink(mug);
} else {
xTaskCreate(sBrew, "brew", 9000, &mug, 1, NULL);
xSemaphoreTake(sCoffeeRdy, portMAX_DELAY);
}
}
vTaskDelete(NULL);
}Re: Memory mapped IO for GPIO access
yes, I want to read and write to an 8-bit wide bus. If you can point me to some code sniplets for the I2S solution you mentioned, I would most appreciate it.
AP
AP
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