SPI master example strange signals

[Valerii]

Hi, I used the spi master example as reference when developed communication with my SPI slave device. I tried to transfer data through SPI but it seemed to be faulty. Than I took spi master example and just changed GPIO numbers to make it correspondent to my esp32 based board. The signal behavior on the lines is the same. I've noticed is that there is no clock on SCK line, only some pulses that are not periodical and does not match with CS pulses. The second one is related CS behavior. What could cause the problem? Any restrictions for GPIO?
Please help.
Logic analyzer cap: https://gyazo.com/23143e625cad0b6eddc3997fc8456a3c

[ESP_Sprite]

That looks verrrry glitchy. Are you sure the timebase on your LA is correct?

[Valerii]

Hi, my LA has max frequency 100MHz and always performed ok. So I don't think that it is caused by LA. Also I decreased clock freq to 10kHz and there where no changes in signal figure.
My SPI pins are: MISO - GPIO_NUM_21, MOSI - GPIO_NUM_5, SCK - GPIO_NUM_19, NSS - GPIO_NUM_25 could this set be reason of problem? What else should I try?

[Valerii]

I have some progress:
In idf example I decreased the clock freq to 10kHz and flashed the firmware to ESP32 dev board (ic rev.1).
SPI pin set as in example:
https://gyazo.com/dba7b09560c96cf1b9b2b0c1c0b91ad7
Than I changed the pin numbers to be the same as in my board.
SPI pin set as in my dev board:
https://gyazo.com/f417ede6e62d80b2d905ddb7eef47a2c
They are different and I believe first cap shows correct data from MOSI line.
Also I flashed this firmware to my board and captured the same result (as in second link).
Thats why I suspect GPIO to be not really "GP"
Any thoughts?

[WiFive]

In the example gpio5 & 21 is used for other purpose did you also change it?
https://github.com/espressif/esp-idf/bl ... main.c#L41

[Valerii]

Nope, I see, they can interfere...I will reassign them and try again. Thanks

[Valerii]

Hi, reassigning pins helped. So the main problem was in too high clock frequency.