Maximum technical IS2 clock frequency

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Vader_Mester
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Maximum technical IS2 clock frequency

Postby Vader_Mester » Wed Jan 10, 2018 12:14 pm

I'm currently puzzled about the fact that the I2S periferial has so many clock deviders, but I can't get my head around it.
(Tried browsing the forum with even less clearance).

So can anyone please sum up for me the maximum possible clocks for BCK and maximum sample rates?
(i'm open to actual register settings here).

Thanks in Advance!

Code: Select all

task_t coffeeTask()
{
	while(atWork){
		if(!xStreamBufferIsEmpty(mug)){
			coffeeDrink(mug);
		} else {
			xTaskCreate(sBrew, "brew", 9000, &mug, 1, NULL);
			xSemaphoreTake(sCoffeeRdy, portMAX_DELAY);
		}
	}
	vTaskDelete(NULL);
}
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WiFive
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Joined: Tue Dec 01, 2015 7:35 am

Re: Maximum technical IS2 clock frequency

Postby WiFive » Wed Jan 10, 2018 1:20 pm

I think max bck is PLL/8 so 40mhz
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Vader_Mester
Posts: 300
Joined: Tue Dec 05, 2017 8:28 pm
Location: Hungary
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Re: Maximum technical IS2 clock frequency

Postby Vader_Mester » Wed Jan 10, 2018 1:46 pm

I thought it could be more than that ... anyway I hope it will be fast enough for me.
Anyways thanks for the input.

Code: Select all

task_t coffeeTask()
{
	while(atWork){
		if(!xStreamBufferIsEmpty(mug)){
			coffeeDrink(mug);
		} else {
			xTaskCreate(sBrew, "brew", 9000, &mug, 1, NULL);
			xSemaphoreTake(sCoffeeRdy, portMAX_DELAY);
		}
	}
	vTaskDelete(NULL);
}
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