RTC RAM

[urbanze]

I have a great project and I will use the super esp32. I know it has several "NVS" but these methods have a low write limit like esp66 (something around 10k)?

For this reason, I intend to use the RTC_SLOW_RAM to store data between deep's and now comes the question: does RTC_RAM have low limit of recordings / etc? The project is not intended to support changes to write defects and I also want to make it simpler than to be swapping write bytes (not to exceed the limit).

Please answer all 3 questions if possible. The project is in progress and it is necessary to decide the method of allocation.

1-) Is it reliable to use RTC_RAM for constant data writing? Or is there a catch with time and limits?
2-) What is the limit of permanent recordings? (NVS, FAT, SPIFFS ......)
3-) What are ALL reasons for RTC_RAM to be reset? As far as I know, it's just POWER ON. Any exception, RTC WATCHDOG or etc is able to restart the values in the RTC_RAM?

[ESP_Sprite]

RTC RAM is... well, RAM. You don't need to worry at all about write cycles there, it doesn't degrade the memory. NVS, FAT and SPIFFS, given you use the variants provided by ESP-IDF, all have wear leveling routines underneath them. It's hard to say how many cycles it will last, because it depends on the type of data you write and how full your storage medium is... but you can assume the bare minimum of data you can write to it is the size of your partition times the amount of write cycles your flash supports. For instance, if you have an 1MiB partition on a Winbond chip which supports 100000 writes, you can safely do up to 100 GB of writes. Wrt the RAM reset reason: According to esp-idf/components/esp32/cpu_start.c around line 151, RTC memory gets cleared unless the wake-up is from deep sleep.

[urbanze]

RTC RAM is... well, RAM. You don't need to worry at all about write cycles there, it doesn't degrade the memory. NVS, FAT and SPIFFS, given you use the variants provided by ESP-IDF, all have wear leveling routines underneath them. It's hard to say how many cycles it will last, because it depends on the type of data you write and how full your storage medium is... but you can assume the bare minimum of data you can write to it is the size of your partition times the amount of write cycles your flash supports. For instance, if you have an 1MiB partition on a Winbond chip which supports 100000 writes, you can safely do up to 100 GB of writes. Wrt the RAM reset reason: According to esp-idf/components/esp32/cpu_start.c around line 151, RTC memory gets cleared unless the wake-up is from deep sleep.

Hi Sprite, thanks!

Only in deep sleep, this makes me less useful

I think I need to go to some non-volatile, what do you say? There are so many that I and many peoples get lost in which to use. Which do you think is better, more stable and trustworthy? If possible, an ordered list from the best to the worst would be interesting!

[ESP_Sprite]

It depends:
- NVS if you only have small things to store (e.g. the configuration of whatever you're writing)
- Spiffs or fatfs if you need to store bigger things.

I'm sure spiffs vs fatfs has drawbacks/advantages, but I haven't used them enough to be able to say anything about that. I *think* I read somewhere that spiffs is slower, but uses less memory than fatfs, but don't take my word on that.

[urbanze]

It depends:
- NVS if you only have small things to store (e.g. the configuration of whatever you're writing)
- Spiffs or fatfs if you need to store bigger things.

I'm sure spiffs vs fatfs has drawbacks/advantages, but I haven't used them enough to be able to say anything about that. I *think* I read somewhere that spiffs is slower, but uses less memory than fatfs, but don't take my word on that.

A fast and little read in "waer leveling" by readdocs of esp32, I found: "FAT FS supports wear leveling"...

I want to use NVS, this "storage" use wear leveling to increase "life time" or only fat?

[WiFive]

You could add fram chip if you need to.

[ESP_Sprite]

Nvs, spiffs and fat (the implementation used in esp-idf) all use wear levelling.

[loboris]

... Only in deep sleep, this makes me less useful ...

With carefully designed software/hardware you can easily achieve ~ 5.5 uA power consumption (tested), you don't need to ever power of the system.
Software/hardware power management can be designed which will automatically switch to small backup battery, save the working state in RTC memory and go to deep sleep when the main battery is removed.
I'm using this approach in one of my projects, and it works great.

[urbanze]

... Only in deep sleep, this makes me less useful ...

With carefully designed software/hardware you can easily achieve ~ 5.5 uA power consumption (tested), you don't need to ever power of the system.
Software/hardware power management can be designed which will automatically switch to small backup battery, save the working state in RTC memory and go to deep sleep when the main battery is removed.
I'm using this approach in one of my projects, and it works great.

Yes, the idea is this also when using the rtc ram. But because the project is a little more serious, I do not want to lose values (although the loss is allowed) in case of watchdog's provided with noises (this in semi industrial environment).

Note: the project will be in a battery bank forever, so power outages should never happen.

I'll test the NVS and use it in conjunction with the rtc ram probably! Thank you all

[urbanze]

Whats de difference between normal RAM and RTC RAM in noinit sections? If this attribute keep value after some resets, only difference are in deep sleep? In all others cases, this two RAM's noinit are equal?