How to use gpio_isr_register?

[rudi ;-)]

mhm..

gpios i want use, 17 and 18..

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#define PIR_GPIO 17
#define BTN_GPIO 18

select gpios..

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gpio_pad_select_gpio(PIR_GPIO);
gpio_pad_select_gpio(BTN_GPIO);

set direction..

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/* Set the GPIO as a input */
gpio_set_direction(PIR_GPIO, GPIO_MODE_INPUT);
gpio_set_direction(BTN_GPIO, GPIO_MODE_INPUT);

set pulls..

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/* Set the GPIO pull */
gpio_set_pull_mode(PIR_GPIO, GPIO_PULLUP_ONLY);
gpio_set_pull_mode(BTN_GPIO, GPIO_PULLUP_ONLY);

set intr type for each

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gpio_set_intr_type(PIR_GPIO, GPIO_INTR_ANYEDGE);
gpio_set_intr_type(BTN_GPIO, GPIO_INTR_NEGEDGE);    

ok i think top is ok...


..now..
enable for each..
( ...but i think this goes wrong...)

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gpio_intr_enable(PIR_GPIO);
gpio_intr_enable(BTN_GPIO);

must be..

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gpio_intr_enable(DUMMY);

register isr
( ...but think we need only one..)

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// Intterrupt number see below
 gpio_isr_register(PIR_GPIO, gpioCallback, (void *)TAG); // 17
 gpio_isr_register(BTN_GPIO, gpioCallback, (void *)TAG); // 18

must be...

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 gpio_isr_register(DUMMY, gpioCallback, (void *)TAG);  // not specified
 

and in isr we select then by

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uint32_t gpio_intr_status = READ_PERI_REG(GPIO_STATUS_REG);   //read status to get interrupt status for GPIO0-31
uint32_t gpio_intr_status_h = READ_PERI_REG(GPIO_STATUS1_REG);//read status1 to get interrupt status for GPIO32-39

..let me try again ... i think i have understand...

[rudi ;-)]

mhm..

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1 Intr GPIO17 ,val: 0<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 1<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 0<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 1<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 0<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO18 ,val: 1<\r><\n>
GPIO 18 request : restart call<\r><\n>
1 Intr GPIO17 ,val: 1<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 0<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 1<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 0<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 1<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 0<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 1<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 0<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 1<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 0<\r><\n>
GPIO 17 request<\r><\n>

if gpio17 fired, and if was gpio18 fired too, then gpio18 is named.
..ok..let me work further...

[rudi ;-)]

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gpio_isr_register(INPUT_GPIO, gpioCallback, (void *)TAG); // 17

By coincidence, INPUT_GPIO = 17 so it works.

ah...

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*      22                      3               extern edge
*      28                      4               extern edge
*      29                      3               software                Reserved                Reserved
*      30                      4               extern edge             Reserved                Reserved

we can register isr for edge ( falling, rising, any ) on "TAG" 22, 28 and 30 is reserved.
and over gpio_num we can get _ which gpio was fired if set as inputs ? ..
right?...
.. mhm..

[rudi ;-)]

No WiFive

there must be other reason for panic'ed:

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void app_main()  
{
  nvs_flash_init();
  system_init();
      
  // xTaskCreate(&main_task, "main_task", 2048, NULL, 5, NULL);
  system_restart();

}

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ets Jun  8 2016 00:22:57<\r><\n>
<\r><\n>
rst:0x1 (POWERON_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)<\r><\n>
ets Jun  8 2016 00:22:57<\r><\n>
<\r><\n>
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)<\r><\n>
configsip: 0, SPIWP:0x00<\r><\n>
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00<\r><\n>
mode:QIO, clock div:2<\r><\n>
load:0x3ffc0000,len:0<\r><\n>
load:0x3ffc0000,len:920<\r><\n>
load:0x40078000,len:2724<\r><\n>
ho 0 tail 12 room 4<\r><\n>
load:0x40098000,len:508<\r><\n>
entry 0x40098118<\r><\n>
<27>[0;32mI (70) heap_alloc_caps: Initializing heap allocator:<27>[0m<\r><\n>
<27>[0;32mI (71) heap_alloc_caps: Region 19: 3FFB4240 len 0002BDC0 tag 0<27>[0m<\r><\n>
<27>[0;32mI (72) heap_alloc_caps: Region 25: 3FFE8000 len 00018000 tag 1<27>[0m<\r><\n>
<27>[0;32mI (82) cpu_start: Pro cpu up.<27>[0m<\r><\n>
<27>[0;32mI (87) cpu_start: Starting app cpu, entry point is 0x40080948<27>[0m<\r><\n>
<27>[0;32mI (0) cpu_start: App cpu up.<27>[0m<\r><\n>
<27>[0;32mI (102) cpu_start: Pro cpu start user code<27>[0m<\r><\n>
rtc v112 Sep 26 2016 22:32:10<\r><\n>
XTAL 40M<\r><\n>
<27>[0;32mI (138) cpu_start: Starting scheduler on PRO CPU.<27>[0m<\r><\n>
<27>[0;32mI (42) cpu_start: Starting scheduler on APP CPU.<27>[0m<\r><\n>
frc2_timer_task_hdl:3ffb9684, prio:22, stack:2048<\r><\n>
c:/sdk32/esp-idf/components/freertos/./queue.c:603 (xQueueGenericSend)- assert failed!<\r><\n>
Guru Meditation Error: Core   0 panic'ed.<\r><\n>
Register dump:<\r><\n>
PC      : Guru Meditation Error of type LoadProhibited occurred on core   0. Exception was unhandled.<\r><\n>
Register dump:<\r><\n>
PC      :  40083456  PS      :  00060033  A0      :  80083679  A1      :  3ffb5e70  <\r><\n>
A2      :  00000000  A3      :  00000002  A4      :  00000000  A5      :  00000000  <\r><\n>
A6      :  3f401044  A7      :  3ff4001c  A8      :  0000007d  A9      :  3ff4001c  <\r><\n>
A10     :  3ff4001c  A11     :  3f4002d0  A12     :  00000000  A13     :  3ffb5ed0  <\r><\n>
A14     :  00000000  A15     :  3f401158  SAR     :  00000019  EXCCAUSE:  0000001c  <\r><\n>
EXCVADDR:  00000004  LBEG    :  4000c2e0  LEND    :  4000c2f6  LCOUNT  :  00000000  <\r><\n>
Rebooting...<\r><\n>
ets Jun  8 2016 00:22:57<\r><\n>
<\r><\n>
rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)<\r><\n>
configsip: 0, SPIWP:0x00<\r><\n>
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00<\r><\n>
mode:QIO, clock div:2<\r><\n>
load:0x3ffc0000,len:0<\r><\n>
load:0x3ffc0000,len:920<\r><\n>
load:0x40078000,len:2724<\r><\n>
ho 0 tail 12 room 4<\r><\n>
load:0x40098000,len:508<\r><\n>
entry 0x40098118<\r><\n>
<27>[0;32mI (324) heap_alloc_caps: Initializing heap allocator:<27>[0m<\r><\n>
<27>[0;32mI (325) heap_alloc_caps: Region 19: 3FFB4240 len 0002BDC0 tag 0<27>[0m<\r><\n>
<27>[0;32mI (335) heap_alloc_caps: Region 25: 3FFE8000 len 00018000 tag 1<27>[0m<\r><\n>
<27>[0;32mI (395) cpu_start: Pro cpu up.<27>[0m<\r><\n>
<27>[0;32mI (430) cpu_start: Starting app cpu, entry point is 0x40080948<27>[0m<\r><\n>
<27>[0;32mI (0) cpu_start: App cpu up.<27>[0m<\r><\n>
<27>[0;32mI (523) cpu_start: Pro cpu start user code<27>[0m<\r><\n>
rtc v112 Sep 26 2016 22:32:10<\r><\n>
XTAL 40M<\r><\n>
<27>[0;32mI (702) cpu_start: Starting scheduler on PRO CPU.<27>[0m<\r><\n>
<27>[0;32mI (213) cpu_start: Starting scheduler on APP CPU.<27>[0m

[rudi ;-)]

my change now:

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// set gpios
#define PIR_GPIO 17
#define BTN_GPIO 18

// change..
// Interrupt Number 22  // edit
// taken for extern edge from table
#define INT_NUMB 22 // edit 

#define TAG 3

select each gpio..

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gpio_pad_select_gpio(PIR_GPIO);
gpio_pad_select_gpio(BTN_GPIO);

direction each gpio..

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/* Set the GPIO as a input */
gpio_set_direction(PIR_GPIO, GPIO_MODE_INPUT);
gpio_set_direction(BTN_GPIO, GPIO_MODE_INPUT);

pull each gpio..

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/* Set the GPIO pull */
gpio_set_pull_mode(PIR_GPIO, GPIO_PULLUP_ONLY);
gpio_set_pull_mode(BTN_GPIO, GPIO_PULLUP_ONLY);

intr type for each gpio...

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gpio_set_intr_type(PIR_GPIO, GPIO_INTR_ANYEDGE);
gpio_set_intr_type(BTN_GPIO, GPIO_INTR_NEGEDGE);	  

i set here for each gpio enable the the isr
and this runs for me.
not sure that we "must" set only onetime
but this runs for me here:

enable intr each gpio..

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gpio_intr_enable(PIR_GPIO);
gpio_intr_enable(BTN_GPIO);

and here is my change...
only one registered isr callback for the "INTR_Numb 22"
i am sure we can set a second if we create a new with second INTR_NUMB like table.

register INTR_NUMB callback for ..

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// Intterrupt number see below
gpio_isr_register(INT_NUMB, gpioCallback, (void *)TAG); 

runs for me like i need...

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1 Intr GPIO18 ,val: 0<\r><\n>
GPIO 18 request<\r><\n>
1 Intr GPIO18 ,val: 0<\r><\n>
GPIO 18 request<\r><\n>
1 Intr GPIO18 ,val: 0<\r><\n>
GPIO 18 request<\r><\n>
1 Intr GPIO17 ,val: 0<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 1<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 0<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 1<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 0<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 1<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO18 ,val: 0<\r><\n>
GPIO 18 request<\r><\n>
1 Intr GPIO17 ,val: 0<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 1<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 0<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 1<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 0<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 1<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO18 ,val: 0<\r><\n>
GPIO 18 request<\r><\n>
1 Intr GPIO17 ,val: 0<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 1<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 0<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 1<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 0<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 1<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 1<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 0<\r><\n>
GPIO 17 request<\r><\n>
1 Intr GPIO17 ,val: 1<\r><\n>
GPIO 17 request<\r><\n>

any objection?

this

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system_restart();

generates this panic*ed :

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c:/sdk32/esp-idf/components/freertos/./queue.c:603 (xQueueGenericSend)- assert failed!<\r><\n>
Guru Meditation Error: Core   0 panic'ed.<\r><\n>
Register dump:<\r><\n>
PC      : Guru Meditation Error of type LoadProhibited occurred on core   0. Exception was unhandled.<\r><\n>
Register dump:<\r><\n>
PC      :  40083456  PS      :  00060033  A0      :  80083679  A1      :  3ffb5e70  <\r><\n>
A2      :  00000000  A3      :  00000002  A4      :  00000000  A5      :  00000000  <\r><\n>
A6      :  3f401044  A7      :  3ff4001c  A8      :  0000007d  A9      :  3ff4001c  <\r><\n>
A10     :  3ff4001c  A11     :  3f4002d0  A12     :  00000000  A13     :  3ffb5ed0  <\r><\n>
A14     :  00000000  A15     :  3f401158  SAR     :  00000019  EXCCAUSE:  0000001c  <\r><\n>
EXCVADDR:  00000004  LBEG    :  4000c2e0  LEND    :  4000c2f6  LCOUNT  :  00000000  <\r><\n>
Rebooting...<\r><\n>
ets Jun  8 2016 00:22:57<\r><\n>

try a simple app code and make a system_restart();
..


best wishes
rudi


here my code:

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/******************************************************************************
 * 
 * Espressif IoT Development Framework with the ESP32  
 *
 * ESP-IDF - 
 * the new Espressif IoT Development Framework with ESP32 from espressif 
 * github              : https://github.com/espressif/esp-idf                       
 *
 *
*******************************************************************************/

#include <stdio.h>
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "esp_system.h"
#include "nvs_flash.h"
#include "driver/gpio.h"
 
#define PIR_GPIO 17
#define BTN_GPIO 18
#define INT_NUMB 22  // edit 

#define TAG 3


void gpioCallback (void* arg);


/******************************************************************************
 * FunctionName : main_task
 * Description  : 
 * Parameters   : void* pvParameter
 * Returns      : void
*******************************************************************************/
void main_task(void* pvParameter)
{
  
  /* Configure the IOMUX register for pad BLINK_GPIO (some pads are
         muxed to GPIO on reset already, but some default to other
         functions and need to be switched to GPIO. Consult the
         Technical Reference for a list of pads and their default
         functions.)
      */
      
	  
      gpio_pad_select_gpio(PIR_GPIO);
      gpio_pad_select_gpio(BTN_GPIO);
      
	  /* Set the GPIO as a input */
      gpio_set_direction(PIR_GPIO, GPIO_MODE_INPUT);
	  gpio_set_direction(BTN_GPIO, GPIO_MODE_INPUT);
	  
	  
      
	  /* Set the GPIO pull */
      gpio_set_pull_mode(PIR_GPIO, GPIO_PULLUP_ONLY);
	  gpio_set_pull_mode(BTN_GPIO, GPIO_PULLUP_ONLY);
  
       
      // gpio_set_intr_type(INPUT_GPIO, GPIO_INTR_NEGEDGE);
	  gpio_set_intr_type(PIR_GPIO, GPIO_INTR_ANYEDGE);
      gpio_set_intr_type(BTN_GPIO, GPIO_INTR_NEGEDGE);	  
  
      gpio_intr_enable(PIR_GPIO);
	  gpio_intr_enable(BTN_GPIO);
	 
  
      // Intterrupt number see below
      gpio_isr_register(INT_NUMB, gpioCallback, (void *)TAG); 
      
	  
  
      while(1) {
      //   printf( "Loop...\n" );
      //  vTaskDelay(1000 / portTICK_RATE_MS);
  }
}

/******************************************************************************
 * FunctionName : gpioCallback
 * Description  : 
 * Parameters   : void* arg
 * Returns      :  
*******************************************************************************/
void gpioCallback(void* arg)
{
    uint32_t gpio_num = 0;
    uint32_t gpio_intr_status = READ_PERI_REG(GPIO_STATUS_REG);   //read status to get interrupt status for GPIO0-31
    uint32_t gpio_intr_status_h = READ_PERI_REG(GPIO_STATUS1_REG);//read status1 to get interrupt status for GPIO32-39
    SET_PERI_REG_MASK(GPIO_STATUS_W1TC_REG, gpio_intr_status);    //Clear intr for gpio0-gpio31
    SET_PERI_REG_MASK(GPIO_STATUS1_W1TC_REG, gpio_intr_status_h); //Clear intr for gpio32-39
    do {
      if(gpio_num < 32) {
        if(gpio_intr_status & BIT(gpio_num)) { //gpio0-gpio31
		ets_printf("1 Intr GPIO%d ,val: %d\n",gpio_num,gpio_get_level(gpio_num));
           //This is an isr handler, you should post an event to process it in RTOS queue.
		   
		   switch (gpio_num) {
			   
			   case 17: ets_printf("GPIO 17 request\n"); break;
			   
			   case 18: ets_printf("GPIO 18 request\n"); 
			            // fflush(stdout);
						// system_restart();
						break;
			} 
			 
		   
		  }
		} else {
        if(gpio_intr_status_h & BIT(gpio_num - 32)) {
          ets_printf("2 Intr GPIO%d, val : %d\n",gpio_num,gpio_get_level(gpio_num));
          //This is an isr handler, you should post an event to process it in RTOS queue.
        }
      }
  } while(++gpio_num < GPIO_PIN_COUNT);
  
  /* push_status = ; */
 }

/******************************************************************************
 * * * * * * * *: main of ESP32 
 * FunctionName : app_main
 * Description  : entry of user application, init user function here
 * Parameters   : none
 * Returns      : none
*******************************************************************************/
void app_main()  
{
  nvs_flash_init();
  system_init();
      
  xTaskCreate(&main_task, "main_task", 2048, NULL, 5, NULL);
  // system_restart();
}

[rudi ;-)]

Also don't do this:

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// Intterrupt number see below
      gpio_isr_register(PIR_GPIO, gpioCallback, (void *)TAG); // 17
      gpio_isr_register(BTN_GPIO, gpioCallback, (void *)TAG); // 18

2nd one cancels the first one and you fell into jimbob's trap

honest - i am not sure in this point -
perhabs one of the esp guys can talk the right way on this.

my code runs like i need with this setup.

ok i have change the callback now,
there you was right, i take the INTR_Numb 22 for extern edge for this now. // edit ( 23 is my com sry )

[rudi ;-)]

No no. You do this many times:

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gpio_intr_enable(GPIO_NUM)

how must this then enable for each?
GPIO_NUM was not the right parameter
i changed this to INTR_NUMB from table for "one INTR Resource"

And you do this only ONCE:

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gpio_isr_register(UNUSED_INTERRUPT_NUM, gpioCallback, (void *)TAG);

you mean, i must create for each enabled intr on gpio ( edge ) a new callback register?
is this possible or is this a must?

And then you do this inside gpioCallback:

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do {
    if(gpio_intr_status & BIT(gpio_num))
...
  } while(++gpio_num < GPIO_PIN_COUNT);

Capisce?

i am honest not sure, that you Capisce the lines

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    if(gpio_intr_status & BIT(gpio_num))

means - is the intr bit was set for the gpio_num...that comes in..

and this?..

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while(++gpio_num < GPIO_PIN_COUNT);

counts the gpios in the isr

and yes - this i do in the isr,
because if set outside from isr
i delay the isr and this is not good for the isr.

Capisce?

the question is ...

@ESP_Sprite..
why system_restart(); makes panic'ed

this is more important.

[rudi ;-)]

No,

my code is not right
there is a small mistake in it..


..

if i set one gpio(gpio18) enable for isr i get for the other ( gpio17 ) no fired isr, this is right,
but in the

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uint32_t gpio_intr_status = READ_PERI_REG(GPIO_STATUS_REG);  

example gpio18 fired then i get for gpio_intr_status

262144 ( uint32_t)
means
1000000000000000000
gpio18


if i push gpio17 i get no fired isr,
but if i push gpio18,
i get gpio_intr_status
393216
means
1100000000000000000
gpio18 + gpio17

..
do we have no document on ISR / INTR / Gpio just in time?

thanks
best wishes
rudi

i know, I2C slave on esp8266 with sda and scl intr was not light but was done..
but we have here in esp32 2 cores and more resource and i think 76 possible peripherial INTR...
so perhabs we wait better for the document?

[rudi ;-)]

this theme is just in time from me in monolog sry

ok.
because i set only one for enable,
there is no clear on the mask for the pushed?
right?

then we have a chance that my code is right?...

now i setup all too for enable and ...
i get for gpio17
131072
means
100000000000000000

and for gpio18
262144
means
1000000000000000000

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GPIO 17 pushed<\r><\n>
handler : 131072<\r><\n>
1 Intr GPIO18 ,val: 0<\r><\n>
GPIO 18 pushed<\r><\n>
handler : 262144<\r><\n>
1 Intr GPIO18 ,val: 0<\r><\n>
GPIO 18 pushed<\r><\n>
handler : 262144<\r><\n>
1 Intr GPIO18 ,val: 0<\r><\n>
GPIO 18 pushed<\r><\n>
handler : 262144<\r><\n>
1 Intr GPIO17 ,val: 0<\r><\n>
GPIO 17 pushed<\r><\n>
handler : 131072<\r><\n>
1 Intr GPIO17 ,val: 0<\r><\n>
GPIO 17 pushed<\r><\n>
handler : 131072<\r><\n>
1 Intr GPIO17 ,val: 0<\r><\n>
GPIO 17 pushed<\r><\n>
handler : 131072<\r><\n>
1 Intr GPIO17 ,val: 1<\r><\n>
GPIO 17 pushed<\r><\n>
handler : 131072<\r><\n>

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/******************************************************************************
 * FunctionName : gpioCallback
 * Description  : 
 * Parameters   : void* arg
 * Returns      :  
*******************************************************************************/
void gpioCallback(void* arg)
{
    uint32_t gpio_num = 0;
    uint32_t gpio_intr_status = READ_PERI_REG(GPIO_STATUS_REG);   //read status to get interrupt status for GPIO0-31
    uint32_t gpio_intr_status_h = READ_PERI_REG(GPIO_STATUS1_REG);//read status1 to get interrupt status for GPIO32-39
    SET_PERI_REG_MASK(GPIO_STATUS_W1TC_REG, gpio_intr_status);    //Clear intr for gpio0-gpio31
    SET_PERI_REG_MASK(GPIO_STATUS1_W1TC_REG, gpio_intr_status_h); //Clear intr for gpio32-39
    do {
      if(gpio_num < 32) {
        if(gpio_intr_status & BIT(gpio_num)) { //gpio0-gpio31
		ets_printf("1 Intr GPIO%d ,val: %d\n",gpio_num,gpio_get_level(gpio_num));
           //This is an isr handler, you should post an event to process it in RTOS queue.
		   
		   switch (gpio_num) {
			   
			   case 17: ets_printf("GPIO 17 pushed\n"); 
						ets_printf("handler : %lu\n", gpio_intr_status);
						break;
			   
			   case 18: ets_printf("GPIO 18 pushed\n"); 
			            ets_printf("handler : %lu\n", gpio_intr_status);
						// fflush(stdout);
						// system_restart();
						break;
			} 
			 
		   
		  }
		} else {
        if(gpio_intr_status_h & BIT(gpio_num - 32)) {
          ets_printf("2 Intr GPIO%d, val : %d\n",gpio_num,gpio_get_level(gpio_num));
          //This is an isr handler, you should post an event to process it in RTOS queue.
        }
      }
  } while(++gpio_num < GPIO_PIN_COUNT);
  
  /* push_status = ; */
 }

[WiFive]

Well I guess if you system_restart from CPU1 you cause exception on CPU0. Not a graceful restart.