My ESP32S3 is communicating with a TI DAC 81401 via SPI. As per the datasheet, the 81401 uses CPOL=0, CPHA=1, ergo MODE_1.
For some reason though, the ESP32 does not properly detect the answers. It comes out as 1 bit shifted to the right, i.e. where I should be getting 810A70, I'm getting 0214E0.
The scope's SPI decoder is in line with what TI says. MOSI seems to be okay, since the TI DAC does what it's supposed to be. Here's a screenshot:
C1=CS, C2=SLCK, C3=MOSI, C4=MISO (mixed MISO and MOSI up @ the scope)
This is even with very low bitrates (1MHz) -- do you have any idea what could be wrong?
SPI Problem
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Re: SPI Problem
Huh??? The scope traces are supposed to be digital signals?!DrMickeyLauer wrote: ↑Thu Jan 30, 2025 2:33 pmC1=CS, C2=SLCK, C3=MOSI, C4=MISO (mixed MISO and MOSI up @ the scope)
How can they degenerate so much? It looks like you have huge capacitances on&between the lines.
Master+slave are connected to a common GND?
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Re: SPI Problem
Yes, they share a common ground. This is a Texas Instruments DAC81408EVM connected via jumper wires to an ESP32S3. It's quite a complex board with lots of jumpers for different operational behaviors, but I think I got it setup correctly. So in your opinion it's the signal quality and not anything with bit timing?
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Re: SPI Problem
Definitely. I didn't realize the scope was showing the SPI signals until I read the line below the imageDrMickeyLauer wrote: ↑Fri Jan 31, 2025 10:37 amSo in your opinion it's the signal quality and not anything with bit timing?

I'd expect it to look something like this for example:

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Re: SPI Problem
I rewired and used scope probes w/ 10x. Does that look better now?
Here with a slower bitrate:
Still the same outcome though. The scope correctly detects 810A70, the ESP32 detects 0214E0.
Here with a slower bitrate:
Still the same outcome though. The scope correctly detects 810A70, the ESP32 detects 0214E0.
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Re: SPI Problem
I take that back. It might have been a combination of bad wiring and bad configuration. The TI DAC's SDO pin can be configured whether it latches @ rising or falling edge – irrespective of being a CPHA=1 device. In some of my tests I had that configuration backwards and with different settings it now seems to work:
Here we see that the bit is valid @ the falling edge and this seems to be what the ESP32 expects when using CPHA=1. Phew.
Here we see that the bit is valid @ the falling edge and this seems to be what the ESP32 expects when using CPHA=1. Phew.
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