RISC-V ULP interrupt context saving

[Baoshi]

In ESP32-S3 RISC-V ULP interrupt code (ulp/ulp_riscv/ulp_core/ulp_riscv_vector.S), there is a note saying:

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Note: We don't save the callee-saved s0-s11 registers to save space

This causes some issues that the riscv32-esp-elf-gcc generated code do used s registers for function local variables. If I manually add saving/restore of s0-s11 then the issue is solved.

Is there an "elegant" way to solve this without touch the esp-idf code base?

Thanks

Baoshi

[MicroController]

Looks fine to me:

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static volatile uint32_t dummy;

void __attribute__((noinline)) testFunc() {
    // Force the compiler to create and hold a lot of local variables:
    uint32_t a,b,c,d,e,f,g,h,i,j,k,l,m,n,o,p;
    uint32_t z;
    a = dummy;
    b = dummy;
    c = dummy;
    d = dummy;
    e = dummy;
    f = dummy;
    g = dummy;
    h = dummy;
    i = dummy;
    j = dummy;
    k = dummy;
    l = dummy;
    m = dummy;
    n = dummy;
    o = dummy;
    p = dummy;

    z = dummy;
    dummy = (a==z) && (b==z) && (c==z) && (d==z) && (e==z) && (f==z) && (g==z) && (h==z) && (i==z) && (j==z) &&
        (k==z) && (l==z) && (m==z) && (n==z) && (o==z) && (p==z);
}

yields

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<testFunc()>:
addi sp,sp,-16
sw s0,12(sp)
sw s1,8(sp)
sw s2,4(sp)
sw s3,0(sp)
lw s3,788(zero) # 314 <dummy>

  ...
 
lw s0,12(sp)
sw a3,788(zero) # 314 <dummy>
lw s1,8(sp)
lw s2,4(sp)
lw s3,0(sp)
addi sp,sp,16
ret

[Baoshi]

This is exactly where the problem is: A function can use s0-s11 for local variables, but when interrupt happens, sx registers are not preserved so when returning from ISR, variable values may change.

[MicroController]

sx registers are not preserved so when returning from ISR, variable values may change.

No. Gcc does the right thing and makes the callee, i.e. the actual ISR function, save&restore the callee-saved registers. Saving the callee-saved registers before calling a function would be rather pointless.