ESP32 C3 custom board WI-FI brownout detector problem.

[Ahmetsafi]

Hello everyone, I designed a custom ESP32-C3 board using the reference peripheral schematic provided in the datasheet. The only modification I made was the removal of a 0-ohm resistor. The board runs other code without issues, but when I attempt to use Wi-Fi, I encounter a brownout detector error, and the module resets itself. I tried both example wi-fi and my own code but result is same.

This is reference that i used.


This is my circuit.

WhatsApp Image 2024-08-07 at 15.00.19.jpeg (113.5 KiB) Viewed 908 times

This is uart output.

I (30) boot: ESP-IDF v5.1-dirty 2nd stage bootloader
I (31) boot: compile time Aug 7 2024 14:26:22
I (31) boot: chip revision: v0.3
I (34) boot.esp32c3: SPI Speed : 80MHz
I (39) boot.esp32c3: SPI Mode : DIO
I (43) boot.esp32c3: SPI Flash Size : 4MB
I (48) boot: Enabling RNG early entropy source...
I (54) boot: Partition Table:
I (57) boot: ## Label Usage Type ST Offset Length
I (64) boot: 0 nvs WiFi data 01 02 00009000 00006000
I (72) boot: 1 phy_init RF data 01 01 0000f000 00001000
I (79) boot: 2 factory factory app 00 00 00010000 00100000
I (87) boot: End of partition table
I (91) esp_image: segment 0: paddr=00010020 vaddr=3c090020 size=1f6e8h (128744) map
I (120) esp_image: segment 1: paddr=0002f710 vaddr=3fc90000 size=00908h ( 2312) load
I (120) esp_image: segment 2: paddr=00030020 vaddr=42000020 size=896a0h (562848) map
I (213) esp_image: segment 3: paddr=000b96c8 vaddr=3fc90908 size=01a0ch ( 6668) load
I (215) esp_image: segment 4: paddr=000bb0dc vaddr=40380000 size=0ff88h ( 65416) load
I (236) boot: Loaded app from partition at offset 0x10000
I (236) boot: Disabling RNG early entropy source...
I (247) cpu_start: Unicore app
I (247) cpu_start: Pro cpu up.
I (256) cpu_start: Pro cpu start user code
I (256) cpu_start: cpu freq: 160000000 Hz
I (256) cpu_start: Application information:
I (259) cpu_start: Project name: wifi_station
I (264) cpu_start: App version: 1
I (269) cpu_start: Compile time: Aug 7 2024 14:27:14
I (275) cpu_start: ELF file SHA256: e49a96717b858994...
I (281) cpu_start: ESP-IDF: v5.1-dirty
I (286) cpu_start: Min chip rev: v0.3
I (291) cpu_start: Max chip rev: v0.99
I (296) cpu_start: Chip rev: v0.3
I (300) heap_init: Initializing. RAM available for dynamic allocation:
I (308) heap_init: At 3FC963A0 len 00046370 (280 KiB): DRAM
I (314) heap_init: At 3FCDC710 len 00002950 (10 KiB): STACK/DRAM
I (320) heap_init: At 50000020 len 00001FE0 (7 KiB): RTCRAM
I (327) spi_flash: detected chip: generic
I (331) spi_flash: flash io: dio
I (336) sleep: Configure to isolate all GPIO pins in sleep state
I (342) sleep: Enable automatic switching of GPIO sleep configuration
I (349) app_start: Starting scheduler on CPU0
I (354) main_task: Started on CPU0
I (354) main_task: Calling app_main()
I (364) wifi station: ESP_WIFI_MODE_STA
I (364) pp: pp rom version: 9387209
I (364) net80211: net80211 rom version: 9387209
I (384) wifi:wifi driver task: 3fc9f090, prio:23, stack:6656, core=0
I (384) wifi:wifi firmware version: b2f1f86
I (384) wifi:wifi certification version: v7.0
I (384) wifi:config NVS flash: enabled
I (384) wifi:config nano formating: disabled
I (394) wifi:Init data frame dynamic rx buffer num: 32
I (394) wifi:Init management frame dynamic rx buffer num: 32
I (404) wifi:Init management short buffer num: 32
I (404) wifi:Init dynamic tx buffer num: 32
I (414) wifi:Init static tx FG buffer num: 2
I (414) wifi:Init static rx buffer size: 1600
I (424) wifi:Init static rx buffer num: 10
I (424) wifi:Init dynamic rx buffer num: 32
I (424) wifi_init: rx ba win: 6
I (434) wifi_init: tcpip mbox: 32
I (434) wifi_init: udp mbox: 6
I (434) wifi_init: tcp mbox: 6
I (444) wifi_init: tcp tx win: 5744
I (444) wifi_init: tcp rx win: 5744
I (454) wifi_init: tcp mss: 1440
I (454) wifi_init: WiFi IRAM OP enabled
I (464) wifi_init: WiFi RX IRAM OP enabled
I (464) phy_init: phy_version 970,1856f88,May$1802023,17:44:12
I (504) wifi:mode : sta (58:cf:79:14:a7:ac�ESP-ROM:esp32c3-api1-20210207
Build:Feb 7 2021
rst:0xf (BROWNOUT_RST),boot:0xd (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fcd5820,len:0x1708
load:0x403cc710,len:0x968
load:0x403ce710,len:0x2e8c
entry 0x403cc710

[ESP_Sprite]

What are you using as your 3.3V power source? Are you sure it can deliver the >=500mA needed, and that you don't have long lines between it and the board?

[Ahmetsafi]

What are you using as your 3.3V power source? Are you sure it can deliver the >=500mA needed, and that you don't have long lines between it and the board?

I'm using a HY3003-3 power supply, which provides a 3 ampere output.

[Ahmetsafi]

What are you using as your 3.3V power source? Are you sure it can deliver the >=500mA needed, and that you don't have long lines between it and the board?

My supply is a hy3003-3 power suppy. That can provide 3 ampere current. And i attached my actual PCB design to this post.

[ESP_Sprite]

Yeah, issue likely is that the wires you connect to your PSU have a relatively high impedance. WiFi eats up very short spikes of lots of power, and the power supply can't provide that 'fast enough' through the high-impedance lines. As a hack to fix this, I'd suggest soldering a whole bunch of extra capacitance close to the ESP32 module; e.g. solder a 220uF cap directly into the footprint for J1. (Fwiw, that's one of the reasons 'real' devices don't come with a 3.3V power supply: they take in e.g. 5V and have a local LDO that can provide a stable 3.3V, and the LDO is relatively close to the ESP32 and has a low-impedance path to it, allowing it to quickly provide any spikes in power requirements the ESP32 might need.)

(On another note: not sure why you put R4 in your schematic. If you cannot reset the ESP32 using the reset button, try shorting it.)
(Also in your PCB design: dual-layer PCBs are more-or-less free nowadays. By trying to keep everything on one side, you're 'squeezing' your ground signal through the little bit of room R2 provides. This not only will be a bit with a lot of resistance, the fact that the return current for the ESP can't flow close to the supply current can give you problems as well. )

[Ahmetsafi]

Yeah, issue likely is that the wires you connect to your PSU have a relatively high impedance. WiFi eats up very short spikes of lots of power, and the power supply can't provide that 'fast enough' through the high-impedance lines. As a hack to fix this, I'd suggest soldering a whole bunch of extra capacitance close to the ESP32 module; e.g. solder a 220uF cap directly into the footprint for J1. (Fwiw, that's one of the reasons 'real' devices don't come with a 3.3V power supply: they take in e.g. 5V and have a local LDO that can provide a stable 3.3V, and the LDO is relatively close to the ESP32 and has a low-impedance path to it, allowing it to quickly provide any spikes in power requirements the ESP32 might need.)

(On another note: not sure why you put R4 in your schematic. If you cannot reset the ESP32 using the reset button, try shorting it.)
(Also in your PCB design: dual-layer PCBs are more-or-less free nowadays. By trying to keep everything on one side, you're 'squeezing' your ground signal through the little bit of room R2 provides. This not only will be a bit with a lot of resistance, the fact that the return current for the ESP can't flow close to the supply current can give you problems as well. )

I managed to connect wi-fi with feeding my board over lm2596 regulator module. Now i am printing with a new design. Thank you very much.