Ethernet: PICO-V3-02 + Lan8720: some design questions

[Ing-Dom]

Hi,

I made a custom board with the PICO-V3-02 that should have wired Ethernet. I choose Lan8720 for that purpose.
While I'm new into using ESP32 I choose to make a evboard with a lot Jumpers so I can learn first and more easily try things out.

I already learned about some basic mistakes I made in my LAN8720 schematic...

No I have to redesign it and to avoid another failure, Id like to ask here..

1) Clock
As I cannot use GPIO 16/17 due to PSRAM, my first choice was to use GPIO as clock output, because it solves the problem with the oscilator interfeering with the bootstrapping function of GPIO0 and additionally, saves the extra cost + board space for the osc.
I read now, that this feature is experimental and that a inverter is neccessary for that signal and that even with that it may not work or not work reliable.

So it seems that using an external 50MHz clock and also disable that clock by default (and pullup to high)and just enable it after startup before ethernet setup by a gpio..

Is that correct? I am VERY short on GPIOs... and I also have no more space for port expander.
Is that GPIO clock-input option a suitable one? Or is also problematic and I must choose another package?


2) EMAC_RX_ER
I came accros the fact that the RX_ER signal is not present on most LAN8720 modules - is it neccessary or even beneficial?
Is is part of the RMII AFAIK, but marked optional but only for switches.
If I don't connect EMAC_RX_ER (GPIO 13) - can I use IO13 as GPIO, then ? Or do I have to pull it low/high ?

[Ing-Dom]

I wanted to add, I use the Pico-V3-02 + LAN8720 because it is a VERY compact solution and I have not much board space.

Thats it how it should look like when layouted in final form factor..

2024-07-15 10_53_31-3D Viewer.png (180.34 KiB) Viewed 1764 times

[ESP_ondrej]

Hi Ing-Dom,

Ad 1) RMII Clock on ESP32 in combination with LAN8720 it's pretty tricky thing... LAN8720 provides CLK on its output even when the chip is in reset. So you need some extra logic to handle it to be able to boot to correct mode. However, it may affect signal integrity, read https://www.crowdsupply.com/silicogniti ... reset-saga to get some idea. The author of this board ended up using different PHY anyway... See https://wesp32.com/hardware/#revision-changes.
Using GPIO0 (or ultimately GPIO16/17) has also its drawbacks... The ESP32 generated RMII CLK stability issues were observed when Wi-Fi is used... It's currently not very well documented but we're working on it. So feel free to use GPIO0 if you are not planning to use Wi-Fi, just bear in mind this limitation. The inverter in the schematics has been used to compensate CLK phase shift caused by PCB if I'm not mistaken. So it may not be used.
To summarize, if I were you, I would rather used different PHY which is able to stop CLK when it is in reset like IP101. Or you can use external 50 MHz oscillator. However, you need to be able to control it and you are short of GPIOs...

Ad 2) EMAC_RX_ER is not initialized and it's not used by ESP-IDF Ethernet driver.

[Ing-Dom]

thanks for your reply.
As the RX_ER Signal is not needed, I have one GPIO free now, so i choose the option to use an external 50MHz osciallator and enable them with a GPIO.
To have a stable "1" at GPIO0 while startup, there is a 10k pullup (the osciallator can push pull 4mA so this 10k is no problem.
I did a quick hack using the clock from a Waveshare, did some wire wrapping to enable/disbale the clock, and it seems to work quite well.